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R-IN32M3_15 Datasheet, PDF (2/105 Pages) Renesas Technology Corp – LSI for Industrial Ethernet
R-IN32M3 Series Data Sheet
1. Overview
1.3 Overview
Table1.2 Overview of R-IN32M3 (1/2)
Product
Item
R-IN32M3
CPU cores
ARM Cortex-M3 32-bit RISC CPU
+ Real-Time OS Accelerator (Hardware Real-Time OS, HW-RTOS)
Operating frequency
100MHz
Instruction set
ThumbⓇ-2 instruction ARMv7-M architecture
Instruction RAM
768KByte (RAM w/ECC)
Data RAM
512KByte (RAM w/ECC)
Buffer RAM
64KByte (RAM w/ECC)
Internal System Bus
- 32-bit system bus at 100MHz
- 128-bit communication bus at 100MHz
DMA
- 4 channels + 1 channel (for Real-time port)
- Supports software and/or various interrupt-triggered DMA
Boot options
- Serial Flash ROM Boot
- External Memory Boot
- External MPU Boot
External Memory Support
- 16-bit or 32-bit bus interface
- Page ROM / ROM / SRAM interface
- Synchronous burst memory interface
- Four chip selects for external SRAM
- 256MByte (max) external memory space
- Programmable wait function
External MPU interface
- 16-bit or 32-bit bus interface
- General-purpose interface for static memory
- Address space:2MByte (Instruction RAM, Data RAM, Register area)
Serial Flash ROM Memory Controller - Support serial interface compatible with SPI of the companies
- Support direct boot from serial memory device
- Support Fast Read, Fast Read Dual Output, Fast Read Dual I/O mode
- Direct layout in memory space
Interrupt Support
- 29 external interrupt ports
Internal Peripherals
I/O Ports
- 96 CMOS I/O ports (max)
System Timers
- Hardware RTOS interal timer
- CPU internal timer
- 4 channels timer array
- 32-bit counter & 32-bit data register
- counter by external signal
Watchdog Timer
- 1 channel
- Software-triggered start mode
- Watchdog error response options:
- Generate Non-Maskable Interrupt (NMI)
- Generate Reset
R18DS0008EJ0204
Dec 25, 2014
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