R-IN32M3_15 Datasheet, PDF (55/105 Pages) Renesas Technology Corp – LSI for Industrial Ethernet

R-IN32M3 Series Data Sheet
3. Specifications
3.14 External MPU Interface
The external MPU interface supports connection of an external MPU. Note that the External MPU interface signals are
shared with the Asynchronous SRAM MEMC and synchronous burst access MEMC ports. Set MEMIFSEL to high to
use these signals for an external MPU rather than for an external memory interface. When BOOT[0-1] is set to 1’b01,
the device will boot from memory connected to CSZ0. Please set MEMIFSEL pin level and hold it until after reset
release ; dynamic switching of MEMIFSEL is not supported.
3.14.1 Features
(1) External MPU Interface
- Interface direction
 SRAM (Read, Write) with WAIT output
 page ROM (Read) with WAIT output
- Synchronization-related
 HBUSCLK sync, async (set by HIFSYNC pin)
Caution When you use asynchronous mode, please input Low into a HBUSCLK pin..
- Bus width
 32-bit, 16-bit (set by BUS32EN pin )
Remark 8 bit bus width is not supported.
- Transfer data size
 32-bit, 16-bit, 8-bit
- Buffer function
 Write buffer : 1 step
 Read buffer : Max. 32-Byte prefetch supported
- Transfer type
 Single transfer
 Page read transfer
- Timing control function
(2) AHB Master port function
- AMBA Ver2.0 following
 32-bit AHB-Lite
 Little endian fixed
- Address conversion
 Accusable to 2MByte area in AHB memory area (4GByte) from external MPU
- Bus sizing function
 External 16-bit => 32-bit
- Error response function
 Output interrupt request (HERROUTZ) in case of receiving error response
 Stored the access information of the cause of error in the register
R18DS0008EJ0204
Dec 25, 2014
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