R-IN32M3_15 Datasheet, PDF (60/105 Pages) Renesas Technology Corp – LSI for Industrial Ethernet

R-IN32M3 Series Data Sheet
3. Specifications
3.18 Data RAM
Data RAM is 512Kbytes of memory that can be accessed from AHB and the Ethernet Accelerator (Header Endec
(encoder/decoder)).
3.18.1 Features
- AHB latency:
 Read / write latency 1 (latency 2 for read access after write access)
- Communication bus latency : 1 for read /write access
- Round-robin bus arbitration
- 32-bit AHB bus width
- 128-bit Communication bus width
- 128-bit RAM Bus width (without ECC)
- AHB transfer size : 8/16/ 32-bit selectable
- Communication bus transfer size : 8/16/32/128-bit selectable
- Burst transmission : single, imprecise burst, precise burst (INCR4/8/16, WRAP4/8/16)
- Little endian fixed
R18DS0008EJ0204
Dec 25, 2014
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