RX110_16 Datasheet, PDF (9/108 Pages) Renesas Technology Corp – 32 MHz 32-bit RX MCUs, 50 DMIPS

RX110 Group
1.3 Block Diagram
Figure 1.2 shows a block diagram.
1. Overview
ROM
RAM
RX CPU
Clock
generation
circuit
ICUb
DTCa
IWDTa
CRC
SCIe × 2 channels
SCIf × 1 channel
RSPI × 1 channel
RIIC × 1 channel
MTU2b × 4 channels
CMT × 2 channels (unit 0)
RTCA
12-bit A/D converter × 14 channels
Temperature sensor
DOC
CAC
Port 0
Port 1
Port 2
Port 3
Port 4
Port 5
Port A
Port B
Port C
Port E
Port H
Port J
ICUb:
DTCa:
IWDTa:
CRC:
SCIe/SCIf:
RSPI:
Interrupt controller
Data transfer controller
Independent watchdog timer
CRC (cyclic redundancy check) calculator
Serial communications interface
Serial peripheral interface
RIIC: I²C bus interface
MTU2b: Multi-function timer pulse unit 2
CMT: Compare match timer
RTCA: Realtime clock
DOC: Data operation circuit
CAC: Clock frequency accuracy measurement circuit
Figure 1.2
Block Diagram
R01DS0202EJ0120 Rev.1.20
Jul 29, 2016
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