RX110_16 Datasheet, PDF (26/108 Pages) Renesas Technology Corp – 32 MHz 32-bit RX MCUs, 50 DMIPS

RX110 Group
2. CPU
Figure 2.1 shows the register set of the CPU.
2. CPU
General-purpose registers
b31
b0
R0 (SP)^*1
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15
Control registers
b31
ISP
USP
INTB
PC
PSW
BPC
BPSW
FINTV
b0
(Interrupt stack pointer)
(User stack pointer)
(Interrupt table register)
(Program counter)
(Processor status word)
(Backup PC)
(Backup PSW)
(Fast interrupt vector register)
DSP instruction register
b63
b0
ACC (Accumulator)
Note 1. The stack pointer (SP) can be the interrupt stack pointer (ISP) or user stack pointer (USP), according to
the value of the U bit in the PSW register.
Figure 2.1
Register Set of the CPU
R01DS0202EJ0120 Rev.1.20
Jul 29, 2016
Page 26 of 108