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RX110_16 Datasheet, PDF (74/108 Pages) Renesas Technology Corp – 32 MHz 32-bit RX MCUs, 50 DMIPS | |||
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RX110 Group
5. Electrical Characteristics
Table 5.32 Timing of On-Chip Peripheral Modules (3)
Conditions: 1.8 V ⤠VCC ⤠3.6 V, 1.8 V ⤠AVCC0 ⤠3.6 V, VSS = AVSS0 = 0 V, Ta = â40 to +105°C, C = 30 pF
Item
Symbol
Min.
Max.
Unit*1 Test Conditions
Simple SCK clock cycle output (master)
SPI
SCK clock cycle input (slave)
tSPcyc
4
65536
tPcyc Figure 5.39
6
65536
SCK clock high pulse width
SCK clock low pulse width
SCK clock rise/fall time
Data input setup time (master)
2.7 V or above
1.8 V or above
tSPCKWH
0.4
tSPCKWL
0.4
tSPCKr, tSPCKf
â
tSU
65
95
0.6
tSPcyc
0.6
tSPcyc
20
ns
â
ns Figure 5.40,
â
Figure 5.42
Data input setup time (slave)
40
â
Data input hold time
SS input setup time
SS input hold time
Data output delay time (master)
Data output delay time (slave) 2.7 V or above
tH
tLEAD
tLAG
tOD
40
â
ns
3
â
tPcyc
3
â
tPcyc
â
40
ns
â
65
1.8 V or above
â
85
Data output hold time (master)
2.7 V or above
1.8 V or above
tOH
â10
â
ns
â20
â
Data output hold time (slave)
â10
â
Data rise/fall time
SS input rise/fall time
Slave access time
Slave output release time
tDr, tDf
â
tSSLr, tSSLf
â
tSA
â
tREL
â
20
ns
20
ns
6
tPcyc Figure 5.44,
6
tPcyc Figure 5.45
Note 1. tPcyc: PCLK cycle
R01DS0202EJ0120 Rev.1.20
Jul 29, 2016
Page 74 of 108
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