H8S2148 Datasheet, PDF (867/1177 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

Section 26 Electrical Characteristics
Table 26.22 Bus Timing (2) (Advanced mode)
Condition A: V_CC = 5.0 V ±10%, V_CCB = 5.0 V ±10%, V_SS = 0 V, φ = 2 MHz to maximum
operating frequency, T_a = –20 to +75°C (regular specifications),
T_a = –40 to +85°C (wide-range specifications)
Condition B: V_CC = 4.0 V to 5.5 V, V_CCB = 4.0 V to 5.5 V, V_SS = 0 V, φ = 2 MHz to maximum
operating frequency, T_a = –20 to +75°C (regular specifications),
T_a = –40 to +85°C (wide-range specifications)
Condition C: V_CC = 2.7 V to 3.6 V, V_CCB = 2.7 V to 5.5 V, V_SS = 0 V, φ = 2 MHz to maximum
operating frequency, T_a = –20 to +75°C
Condition A
20 MHz
Item
Symbol Min Max
Address t_AD
delay time
—
30
Address t_AS
setup time
Address t
AH
hold time
CS delay t_CSD
time (IOS)
0.5 × —
t_cyc –25
0.5 × —
t_cyc –10
—
30
AS delay t
ASD
time
—
30
RD delay t_RSD1
—
30
time 1
RD delay t_RSD2
—
30
time 2
Read data t_RDS
setup time
15
—
Read data t_RDH
0
—
hold time
Read data t_ACC1
—
1.0 ×
access
t_cyc –40
time 1
Read data t
ACC2
—
1.5 ×
access
t_cyc –25
time 2
Condition B
16 MHz
Min Max
—
45
0.5 × —
t_cyc –35
0.5 × —
t_cyc –15
—
45
—
45
—
45
—
45
20
—
0
—
—
1.0 ×
t_cyc –55
—
1.5 ×
t_cyc –35
Condition C
10 MHz
Min Max
—
60
0.5 × —
t_cyc –50
0.5 × —
t_cyc –20
—
60
—
60
—
60
—
60
35
—
0
—
—
1.0 ×
t_cyc –80
—
1.5 ×
t_cyc –50
Test
Unit Conditions
ns Figure 26.10
to
ns ^{figure 26.14}
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Rev. 4.00 Sep 27, 2006 page 823 of 1130
REJ09B0327-0400