H8S2148 Datasheet, PDF (644/1177 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

Section 18 Host Interface
Table 18.8 shows the scope of HIF pin shutdown in slave mode.
Table 18.8 Scope of HIF Pin Shutdown in Slave Mode
Abbreviation Port
Scope of
Shutdown in
Slave Mode I/O
Selection Conditions
IOR
P93
O
Input
Slave mode
IOW
P94
O
Input
Slave mode
CS1
P95
O
Input
Slave mode
CS2
P81
∆
Input
Slave mode and CS2E = 1 and FGA20E = 0
ECS2
P90
∆
Input
Slave mode and CS2E = 1 and FGA20E = 1
CS3
PB2
∆
Input
Slave mode and CS3E = 1
CS4
PB3
∆
Input
Slave mode and CS4E = 1
HA0
P80
O
Input
Slave mode
HDB7 to
HDB0
P37 to O
P30
I/O
Slave mode
HIRQ11
P43
∆
Output Slave mode and CS2E = 1 and P43DDR = 1
HIRQ1
P44
∆
Output Slave mode and P44DDR = 1
HIRQ12
P45
∆
Output Slave mode and P45DDR = 1
HIRQ3
PB0
∆
Output Slave mode and CS3E = 1 and PB0DDR = 1
HIRQ4
PB1
∆
Output Slave mode and CS4E = 1 and PB1DDR = 1
GA20
P81
∆
Output Slave mode and FGA20E = 1
HIFSD
P82
—
Input
Slave mode and SDE = 1
Legend:
O: Pins shut down by shutdown function
The IRQ2/ADTRG input signal is also fixed in the case of P90 shutdown, the TMCI1/HSYNCI
signal in the case of P43 shutdown, and the TMRI/CSYNCI in the case of P45 shutdown.
∆: Pins shut down only when the HIF function is selected by means of a register setting
—: Pin not shut down
Note: Slave mode: Single-chip mode and HI12E = 1
Rev. 4.00 Sep 27, 2006 page 600 of 1130
REJ09B0327-0400