H8S2148 Datasheet, PDF (181/1177 Pages) Renesas Technology Corp – Renesas 16-Bit Single-Chip Microcomputer H8S Family/H8S/2100 Series

Section 5 Interrupt Controller
Table 5.6 Interrupts Selected in Each Interrupt Control Mode
Interrupt Control Mode
0
1
Legend:
*: Don’t care
Interrupt Mask Bits
I
UI
0
*
1
*
0
*
1
0
1
Selected Interrupts
All interrupts (control level 1 has priority)
NMI and address break interrupts
All interrupts (control level 1 has priority)
NMI, address break and control level 1
interrupts
NMI, and address break interrupts
Default Priority Determination
The priority is determined for the selected interrupt, and a vector number is generated.
If the same value is set for ICR, acceptance of multiple interrupts is enabled, and so only the
interrupt source with the highest priority according to the preset default priorities is selected and
has a vector number generated.
Interrupt sources with a lower priority than the accepted interrupt source are held pending.
Table 5.7 shows operations and control signal functions in each interrupt control mode.
Table 5.7 Operations and Control Signal Functions in Each Interrupt Control Mode
Interrupt
Control Mode
Setting
INTM1 INTM0
Interrupt Acceptance Control
3-Level Control
I
UI
ICR
0
0
0
O
IM
—
PR
1
0
1
O
IM
IM
PR
Legend:
O: Interrupt operation control performed
IM: Used as interrupt mask bit
PR: Sets priority
—: Not used
Default Priority
Determination
T
(Trace)
O
—
O
—
Rev. 4.00 Sep 27, 2006 page 137 of 1130
REJ09B0327-0400