RZT1_15 Datasheet, PDF (7/52 Pages) Renesas Technology Corp – 450 MHz/600MHz, MCU with ARM Cortex®-R4F

Under development ^{Preliminary document}
Specifications in this document are tentative and subject to change.
RZ/T1 Group
1. Overview
Table 1.1
Outline of Specifications (6 / 7)
Classification Module/Function
Communication Serial peripheral
function
interface (RSPIa)
Description
 4 channels
 RSPI transfer facility
Using the MOSI (master out slave in), MISO (master in slave out), SSL (slave select),
and RSPCK (RSPI clock) signals enables serial transfer through SPI operation (four
lines) or clock-synchronous operation (three lines)
Capable of handling serial transfer as a master or slave
 Data formats
Switching between MSB first and LSB first
The number of bits in each transfer can be changed to any number of bits from 8 to 16,
or to 20, 24, or 32 bits.
128-bit buffers for transmission and reception
Up to four frames can be transmitted or received in a single transfer operation (with
each frame having up to 32 bits)
 Buffered structure
Double buffers for both transmission and reception
 RSPCK can be stopped automatically with the receive buffer full for master reception
 Event linking by the ELC
SPI multi I/O bus
controller (SPIBSC)
Serial sound interface (SSI)
∆Σ interface (DSMIF)
12-bit A/D converter (S12ADC)
Temperature sensor
 1 channel
 One serial flash memory with multiple I/O bus sizes (single/dual/quad) can be
connected.
 External address space read mode (built-in read cache)
 SPI operating mode
 Clock polarity and clock phase can be selected.
 Maximum transfer rate: 300 Mbps (for quad)
 1 channel
 Duplex communication
 Support of various serial audio formats
 Support of master and slave functions
 Generation of programmable word clock and bit clock
 Support of 8, 16, 18, 20, 22, 24, and 32-bit data formats
 Support of eight-stage FIFO for transmission and reception
 Support of WS continue mode in which the SSIWS signal is not stopped.
 4 channels
 Up to 4 ∆Σ modulators are externally connectable
 Sync filter can be selected as first, second or third order
 12 bits × 2 units (unit 0: 8 channels, unit 1: 16 channels)*¹
 12-bit resosultion
 Conversion time
Unit 0: 0.6 s per channel
Unit 1: 2.0 s per channel
 Operating mode
Scan mode (single scan mode, continuous scan mode, or group scan mode)
Group A priority control (only for group scan mode)
 Sample-and-hold function
Common sample-and-hold circuit included
In addition, channel-dedicated sample-and-hold function (4 channels: in unit 0 only)
included
 Sampling variable
Sampling time can be set up for each channel
 Self-diagnostic function
The self-diagnostic function internally generates three analog input voltages
(unit 0: VREFL0, VREFH0 × 1/2, VREFH0; unit 1: VREFL1, VREFH1 × 1/2, VREFH1)
 Double trigger mode (A/D conversion data duplicated)
 Detection of analog input disconnection
 Three ways to start A/D conversion
Software trigger, timer (MTU3a, GPTa, TPUa) trigger, external trigger
 Event linking by the ELC
 1 channel
 Relative precision: ±1°C
 The voltage of the temperature is converted into a digital value by the 12-bit A/D
converter (unit 0).
R01DS0228EJ0070 Rev.0.70
Dec 25, 2014
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