RZT1_15 Datasheet, PDF (17/52 Pages) Renesas Technology Corp – 450 MHz/600MHz, MCU with ARM Cortex®-R4F

Under development ^{Preliminary document}
Specifications in this document are tentative and subject to change.
RZ/T1 Group
1. Overview
Table 1.4
Pin Functions (5 / 7)
Classifications
Pin Name
I/O
Ethernet controller
(ETHERC)
ETH0_TXC, ETH1_TXC, Input
ETH2_TXC
ETH0_TXEN,
ETH1_TXEN,
ETH2_TXEN
ETH0_TXER,
ETH1_TXER,
ETH2_TXER
Output
Output
ETH0_TXD0 to 3,
ETH1_TXD0 to 3,
ETH2_TXD0 to 3
Output
ETH0_RXC, ETH1_RXC, I/O
ETH2_RXC
ETH0_RXDV,
ETH1_RXDV,
ETH2_RXDV
Input
ETH0_RXER,
ETH1_RXER,
ETH2_RXER
Input
ETH0_RXD0 to 3,
ETH1_RXD0 to 3
Input
ETH0_CRS, ETH1_CRS, Input
ETH2_CRS
ETH0_COL, ETH1_COL, Input
ETH2_COL
ETH_MDC, MII2_MDC Output
ETH_MDIO, MII2_MDIO I/O
PHYLINK0, PHYLINK1, Input
PHYLINK2
ETHSWSECOUT
PHYRESETOUT#,
PHYRESTOUT2#
Output
Output
EtherCAT slave controller
(ECATC)
(only included in products
incorporating an R-IN
engine)
CATLEDRUN
CATIRQ
CATLEDSTER
CATLEDERR
CATLINKACT0,
CATLINKACT1
Output
Output
Output
Output
Output
CATSYNC0, CATSYNC1 Output
CATLATCH0,
CATLATCH1
CATI2CCLK
Input
Output
CATI2CDATA
CATRESTOUT
I/O
Output
Description
Input the 10 M/100 M transmission clock (2.5 MHz/25 MHz).
Output the transmission enable signal.
Output the transmission error signal.
Output the transmission data signal.
Receive clock I/O pins
Input the receive data enable signal.
Input the receive data error signal.
Input the receive data signal.
Input the carrier sense signal.
Input the collision detection signal.
Output the management interface clock.
Management data signal I/O pins
Input the PHY Link signal (for Ether Switch).
Event output pin for Ether Switch per second
Output the PHY RESETOUT signal.
Outputs the EtherCAT RUN LED signal.
Outputs the EtherCAT IRQ signal.
Outputs the EtherCAT Dual-color state LED signal.
Outputs the EtherCAT error LED signal.
Output the EtherCAT link/activity LED signal.
Output the EtherCAT SYNC signal.
Input the EtherCAT LATCH signal.
Outputs the EtherCAT EEPROM I²C clock signal.
Inputs/outputs the EtherCAT EEPROM I²C data signal.
Outputs the EtherCAT PHY RESETOUT signal.
R01DS0228EJ0070 Rev.0.70
Dec 25, 2014
Page 17 of 52