RZT1_15 Datasheet, PDF (20/52 Pages) Renesas Technology Corp – 450 MHz/600MHz, MCU with ARM Cortex®-R4F

Under development ^{Preliminary document}
Specifications in this document are tentative and subject to change.
RZ/T1 Group
1. Overview
1.5 Pin Assignments
Figure 1.2 and Figure 1.3 show the pin arrangement. Table 1.5 and Table 1.6 show the pin assignments. Table 1.7
and Table 1.8 show the lists of pin functions.
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20
A VSS PC2 PJ3 PJ1 PF7 PB4 PB0 PC0 PF6 VCC P54 VSS AN0 AN0 AN0 AVC AVC VRE P17 VSS A
Q33
07 05 02 C0 C1 FH1
B
B PJ5 PJ4 PC3 PJ2 PJ0 PB5 PB2 PC1 PB7 P86 PD7 P52 AN0 AN0 AN0 AVS AVS VRE P16 P15 B
06 03 01 S0 S1 FL1
C PJ7 PJ6 PU2 PL7 PL5 PB6 PB3 PB1 PF5 P87 PD6 P53 P51 AN0 AN0 VRE VRE PD2 P14 P13 C
04 00 FL0 FH0
D P81 P80 PU3
PD0 P96 P95 D
E P84 P82 PU1
F PC4 P83 P85
G PU6 PC5 VCC
Q33
H PU7 PM1 P35
J PM6 PM3 PM2
K PM7 PM5 PM4
L MD1 MD2 TMS
M XTA EXT OSC
L
AL TH
N VSS
P VSS
_US
B
R USB
_DP
MD0
VDD
33_
USB
USB
_DM
RST
OUT
#
USB
_RR
EF
P30
T DVD VDD P32
D_U 33_
SB USB
U P60 P63 PN1
PU0 PL6 PL4 PL2 PL0 PK7 PK6 PD5 P56 PD4 VCC PD1
Q33
PU4 VSS VCC PL3 PL1 PK5 PK4 P55 P50 PD3 PK2 P90
Q33
PU5 PM0
PK3 PA7
ERR
ORO
UT
P33
VCC
Q33
TRS
T#
VDD VDD VDD VDD VDD VSS
VDD VSS VSS VSS VSS VDD
PA6 PA5
VCC PA1
Q33
P34
TCK
BSC
ANP
RES
#
P31
PLL
VDD
1
PLL
VSS
1
PLL
VDD
0
PLL
VSS
0
VCC
Q33
VDD VSS VSS VSS VSS VDD
VDD VSS VSS VSS VSS VDD
VDD VSS VSS VSS VSS VDD
VDD VSS VDD VDD VDD VDD
VSS P77
VSS PE7
VCC PE6
Q33
PE2 PE4
P06 P07
PN0 PN2 PG0 PG2 PG7 PH2 PH4 PH6 P23 P27 P47 VCC
Q33
PC6 P37 P36 PG3 PG6 PH3 VCC PH5 VCC P26 VCC VSS
Q33
Q33
Q33
P97 P94 P93 E
P92 P91 P12 F
PA4 PA3 P11 G
PA2 PK0 PK1 H
PA0 PT7 PT6 J
P76 P75 PT5 K
P72 P73 P74 L
P70 PT4 P71 M
PE5 PT2 PT3 N
PE3 PT0 PT1 P
VCC PS6 PS7 R
Q33
VSS PE0 PE1 T
P00 P04 P03 U
V P61 P64 PN3 PN4 PC7 PG1 PG4 PG5 PH0 PH1 PH7 P20 P21 VSS P45 P46 PS2 P05 P01 P02 V
W P62 P65 PN5 PN6 PP0 PP2 PP4 PP6 PP7 PR1 PR3 PR5 P24 P22 P44 P43 PS1 PS3 PS4 PS5 W
Y VSS P67 P66 PN7 PP1 PP3 PP5 VSS PR0 PR2 PR4 PR6 PR7 P25 P41 P42 P40 PS0 P10 VSS Y
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Figure 1.2
Pin Arrangement (320-Pin FBGA)
R01DS0228EJ0070 Rev.0.70
Dec 25, 2014
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