RZT1_15 Datasheet, PDF (34/52 Pages) Renesas Technology Corp – 450 MHz/600MHz, MCU with ARM Cortex®-R4F

Under development ^{Preliminary document}
Specifications in this document are tentative and subject to change.
RZ/T1 Group
1. Overview
Table 1.7
List of Pin and Pin Functions (320-Pin FBGA) (1 / 10)
Pin
Number
320-Pin
FBGA
Power
Supply
Clock
System
Contro
A1
VSS
A2
A3
A4
A5
A6
A7
A8
A9
A10
VCCQ33
A11
A13
A14
A15
A16
AVCC0
A17
AVCC1
A18
VREFH1
A19
A20
VSS
B1
B2
B3
B4
B5
B6
I/O Port Bus
PC2
PJ3
PJ1
PF7
A25
PB4
A24
PB0
PC0
WAIT#
PF6
P54
Timer
(MTU3a, GPTa,
TPUa, PPG, POE3,
CMTW)
Communication
(ETHERC,
ECATC*¹, SCIFA,
RSPIa, RIICa,
RSCAN, SPIBSC,
USB)
Others
(SSI, DSMIF) Interrupt S12ADC
MTCLKB / TCLKD /
TIC3
GTETRG
MTIOC3D /
GTIOC0B / TOC2
ETH0_TXC /
ETH1_RXD2 /
CATI2CDATA /
SDA0
ETH0_TXD0
ETH0_TXD2 /
CATLEDSTER /
RSPCK3
ETH0_TXER /
RTS3# / SSL30
ETH1_COL /
ETH0_RXER /
CATSYNC0 /
CATLATCH0 / RXD3
/ MOSI3_BLUE
MDAT0
ETH1_RXDV
ETH1_RXD2 / SCL1 MDAT3
ETH1_RXD0
IRQ11
ADTRG0
IRQ7
CLKOUT25M1 /
MOSI2_RED
AN007
AN005
AN002
P17
CS5#
PJ5
PJ4
PC3
PJ2
PJ0
PB5
ETH1_TXER /
PHYRESETOUT#
TIOCD0
TCLKB / POE0# /
POE10#
ETH0_RXD1 / RXD3
ETH0_RXD0 / TXD3
ETH0_RXC /
ETH0_RXDV /
CATI2CCLK / RXD4
/ SCL0 / CRXD1
ETH0_TXD1 /
MISO3
ETH0_TXD3 /
CATLEDERR /
MOSI3_RED
ETH_MDIO / CTS3#
/ RSPCK3
ADTRG0
IRQ10
IRQ8
R01DS0228EJ0070 Rev.0.70
Dec 25, 2014
Page 34 of 52