RZT1_15 Datasheet, PDF (47/52 Pages) Renesas Technology Corp – 450 MHz/600MHz, MCU with ARM Cortex®-R4F

Under development ^{Preliminary document}
Specifications in this document are tentative and subject to change.
RZ/T1 Group
1. Overview
Table 1.8
List of Pin and Pin Functions (176-Pin HLQFP) (4 / 6)
Pin
Number
Timer
Communication
176-Pin
HLQFP
Power
Supply
Clock
System
Contro
I/O
Port Bus
104
TRACEDATA PE5 D13
5
(MTU3a, GPTa,
TPUa, PPG,
POE3, CMTW)
MTIOC0C /
TIOCC3
(ETHERC,
ECATC*¹, SCIFA,
RSPIa, RIICa,
RSCAN, SPIBSC,
USB)
TXD1 /
MOSI0_BLUE
105
TRACEDATA PE6 D14
6
MTIOC0A /
TIOCD0
RXD1 / MISO0
106
TRACEDATA PE7 D15
7
107
VSS
MTIOC7A /
SCK1 / RSPCK0
TIOCD3 / POE8#
108
VDD
109
TRACECLK P70 D16
MTIOC6D
RTS1# /
USB_OVRCUR
110
TRACECTL P71 D17 / D7
POE0# / POE10# SCK1
/ TOC2
111
TRACEDATA P72 D18
0
112
TRACEDATA P73 D19
1
MTIOC1A / TIC2 TXD1
MTCLKB
RXD1
113
TRACEDATA P74 D20
2
MTCLKA
CTS1# / SSL03
114
TRACEDATA P75 D21
3
115
TRACEDATA P76 D22
4
MTIOC4D /
GTIOC2B
MTIOC4B /
GTIOC2A
SSL00
SSL01
116
TRACEDATA P77 D23
5
MTIOC4C /
GTIOC1B
RSPCK0
117
TRACEDATA PA0 D24
6
MTIOC4A /
GTIOC1A
MOSI0_RED
118
TRACEDATA PA1 D25
7
MTIOC3D /
GTIOC0B
MISO0
119
VSS
120
VDD
121
PA2 D26 /
MTIOC3B /
SSL02
DREQ2
GTIOC0A
122
PA3 D27 / DACK2 GTETRG /
ETHSWSECOUT /
TIOCA2
SCK2
123
PA4 D28 / TEND2 TIOCA3
ETH1_INT / RXD2
124
PA5 D29
TIOCA4
ETH0_INT /
ETH1_TXER /
TXD2
125
PA6 D30 / A21 GTIOC3A
CTS2#
126
VCCQ33
127
128
VDD
PA7 D31 / A22 MTIOC6B /
GTIOC3B
RTS2#
129
VSS
130
P13 RAS#
MTIOC4C /
GTIOC1B
Others
(SSI, DSMIF) Interrupt S12ADC
IRQ6
IRQ0
SSITXD0
SSIRXD0
SSISCK0
SSIWS0
IRQ3
IRQ13
MDAT3
AUDIO_CLK
/ MCLK3
MDAT2
MCLK2
MDAT1
MCLK1
ADTRG0
MDAT0
MCLK0
IRQ6
IRQ7
R01DS0228EJ0070 Rev.0.70
Dec 25, 2014
Page 47 of 52