RZT1_15 Datasheet, PDF (16/52 Pages) Renesas Technology Corp – 450 MHz/600MHz, MCU with ARM Cortex®-R4F

Under development ^{Preliminary document}
Specifications in this document are tentative and subject to change.
RZ/T1 Group
1. Overview
Table 1.4
Pin Functions (4 / 7)
Classifications
Pin Name
16-bit timer pulse unit
(TPUa)
TIOCA0, TIOCB0,
TIOCC0, TIOCD0
TIOCA1, TIOCB1
TIOCA2, TIOCB2
TIOCA3, TIOCB3
TIOCC3, TIOCD3
TIOCA4, TIOCB4
TIOCA5, TIOCB5
TCLKA, TCLKB
TCLKC, TCLKD
TIOCA6, TIOCB6
TIOCC6, TIOCD6
TIOCA7, TIOCB7
TIOCA8, TIOCB8
TIOCA9, TIOCB9
TIOCC9, TIOCD9
TIOCA10, TIOCB10
TIOCA11, TIOCB11
Programmable pulse
generator (PPG)
Compare match timer W
(CMTW)
Serial communication
interface with FIFO
(SCIFA)
I²C bus interface (RIICa)
TCLKE, TCLKF
TCLKG, TCLKH
PO0 to PO31
TIC0 to TIC3
TOC0 to TOC3
SCK0 to SCK4
RXD0 to RXD4
TXD0 to TXD4
CTS0# to CTS4#
RTS0# to RTS4#
SCL0, SCL1
SDA0, SDA1
I/O
I/O
I/O
I/O
I/O
I/O
I/O
Input
Description
TPU0.TGRA0 to TPU0.TGRD0 input capture input/output
compare output/PWM output pins
TPU0.TGRA1 and TPU0.TGRB1 input capture input/output
compare output/PWM output pins
TPU0.TGRA2 and TPU0.TGRB2 input capture input/output
compare output/PWM output pins
TPU0.TGRA3 to TPU0.TGRD3 input capture input/output
compare output/PWM output pins
TPU0.TGRA4 and TPU0.TGRB4 input capture input/output
compare output/PWM output pins
TPU0.TGRA5 and TPU0.TGRB5 input capture input/output
compare output/PWM output pins
External clock input pins for TPU0
I/O
I/O
I/O
I/O
I/O
I/O
Input
TPU1.TGRA0 to TPU1.TGRD0 input capture input/output
compare output/PWM output pins
TPU1.TGRA1 and TPU1.TGRB1 input capture input/output
compare output/PWM output pins
TPU1.TGRA2 and TPU1.TGRB2 input capture input/output
compare output/PWM output pins
TPU1.TGRA3 to TPU1.TGRD3 input capture input/output
compare output/PWM output pins
TPU1.TGRA4 and TPU1.TGRB4 input capture input/output
compare output/PWM output pins
TPU1.TGRA5 and TPU1.TGRB5 input capture input/output
compare output/PWM output pins
External clock input pins for TPU1
Output Pulse output pins
Input
Output
I/O
Input
Output
Input
Output
I/O
I/O
CMTW input capture input pins
CMTW output compare output pins
Clock I/O pins
Input the receive data.
Output the transmit data.
Input pins for controlling the start of transmission and reception
Output pins for controlling the start of transmission and reception
Clock I/O pins. The bus can be directly driven by the N-channel
open drain.
Data I/O pins. The bus can be directly driven by the N-channel
open drain.
R01DS0228EJ0070 Rev.0.70
Dec 25, 2014
Page 16 of 52