H8S2117R Datasheet, PDF (681/1024 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family / H8S/2100 Series

Section 20 LPC Interface (LPC)
R/W
Bit Bit Name Initial Value Slave Host Description
3 IRQ9E4 0
R/W  Host IRQ9 Interrupt Enable 4
Enables or disables an HIRQ9 interrupt request
when OBF4 is set by an ODR4 write.
0: HIRQ9 interrupt request by OBF4 and IRQE9E4
is disabled
[Clearing conditions]
• Writing 0 to IRQ9E4
• LPC hardware reset, LPC software reset
• Clearing OBF4 to 0 (when IEDIR4 = 0)
1: [When IEDIR4 = 0]
HIRQ9 interrupt request by setting OBF4 to 1 is
enabled
[When IEDIR4 = 1]
HIRQ9 interrupt is requested
[Setting condition]
Writing 1 after reading IRQ9E4 = 0
2 IRQ6E4 0
R/W  Host IRQ6 Interrupt Enable 4
Enables or disables an HIRQ6 interrupt request
when OBF4 is set by an ODR4 write.
0: HIRQ6 interrupt request by OBF4 and IRQE6E4
is disabled
[Clearing conditions]
• Writing 0 to IRQ6E4
• LPC hardware reset, LPC software reset
• Clearing OBF4 to 0 (when IEDIR4 = 0)
1: [When IEDIR4 = 0]
HIRQ6 interrupt request by setting OBF4 to 1 is
enabled
[When IEDIR4 = 1]
HIRQ6 interrupt is requested
[Setting condition]
Writing 1 after reading IRQ6E4 = 0
Rev. 1.00 Apr. 28, 2008 Page 655 of 994
REJ09B0452-0100