H8S2117R Datasheet, PDF (552/1024 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family / H8S/2100 Series

Section 17 Serial Communication Interface with FIFO (SCIF)
Table 17.8 shows the range of initialization of the registers related to data transmission/reception
through the LPC interface, making a classification by each mode.
Table 17.8 Register States
Register
System
LPC
Reset SCIFRST REGRST Reset
LPC
LPC
Shutdown Abort
SCIFADRH Bits 15 to 8
Initialized Retained Retained Retained Retained Retained
SCIFADRL Bits 7 to 0
Initialized Retained Retained Retained Retained Retained
HICR5
SCIFE
Initialized Retained Retained Retained Retained Retained
SIRQCR4 Bits 7 to 4,
Initialized Retained Retained Retained Retained Retained
SCSIRQ3 to 0
SCIFCR
SCIFOE1,
SCIFOE0,
OUT2LOOP,
CKSEL1,
CKSEL0,
SCIFRST,
REGRST
Initialized Retained Retained Retained Retained Retained
FRBR
Bits 7 to 0
Initialized Retained Initialized Initialized Retained Retained
FTHR
Bits 7 to 0
Initialized Retained Initialized Initialized Retained Retained
FDLL
Bits 7 to 0
Initialized Retained Initialized Initialized Retained Retained
FDLH
Bits 7 to 0
Initialized Retained Initialized Initialized Retained Retained
FIIR
FIFOE1,
Initialized Retained Initialized Initialized Retained Retained
FIFOE0, INTID2
to INTID0,
INTPEND
FFCR
RCVRTRIG1,
RCVRTRIG0,
XMITFRST,
RCVRFRST,
FIFOE
Initialized Retained Initialized Initialized Retained Retained
FLCR
DLAB, TREAK,
EPS, PEN,
STOP, CLS1,
CLS0
Initialized Retained Initialized Initialized Retained
Retained
Rev. 1.00 Apr. 28, 2008 Page 526 of 994
REJ09B0452-0100