H8S2117R Datasheet, PDF (285/1024 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family / H8S/2100 Series

Section 10 16-Bit Timer Pulse Unit (TPU)
Initial
Bit Bit Name value R/W Description
2
TGIEC
0
R/W TGR Interrupt Enable C
Enables or disables interrupt requests (TGIC) by the
TGFC bit when the TGFC bit in TSR is set to 1 in
channel 0. In channels 1 and 2, bit 2 is reserved. It is
always read as 0 and cannot be modified.
0: Interrupt requests (TGIC) by TGFC disabled
1: Interrupt requests (TGIC) by TGFC enabled
1
TGIEB
0
R/W TGR Interrupt Enable B
Enables or disables interrupt requests (TGIB) by the
TGFB bit when the TGFB bit in TSR is set to 1.
0: Interrupt requests (TGIB) by TGFB disabled
1: Interrupt requests (TGIB) by TGFB enabled
0
TGIEA
0
R/W TGR Interrupt Enable A
Enables or disables interrupt requests (TGIA) by the
TGFA bit when the TGFA bit in TSR is set to 1.
0: Interrupt requests (TGIA) by TGFA disabled
1: Interrupt requests (TGIA) by TGFA enabled
Rev. 1.00 Apr. 28, 2008 Page 259 of 994
REJ09B0452-0100