H8S2117R Datasheet, PDF (253/1024 Pages) Renesas Technology Corp – 16-Bit Single-Chip Microcomputer H8S Family / H8S/2100 Series

Section 9 14-Bit PWM Timer (PWMX)
Table 9.4 Reading/Writing to 16-bit Registers
Read
Write
Register
Word
Byte
Word
Byte
DADRA, DADRB O
O
O
×
DACNT
O
×
O
×
[Legend]
O: Enabled access.
Word-unit access includes accessing byte sequentially, first upper byte, and then lower
byte.
×: The result of the access in the unit cannot be guaranteed.
(a) Write to upper byte
CPU
[H'AA]
Upper byte
Bus interface
Module data bus
TEMP
[H'AA]
(b) Write to lower byte
CPU
[H'57]
Lower byte
Bus interface
DACNTH
[
]
DACNTL
[
]
Module data bus
TEMP
[H'AA]
DACNTH
[H'AA]
DACNTL
[H'57]
Figure 9.2 DACNT Access Operation (1) [CPU → DACNT (H'AA57) Writing]
Rev. 1.00 Apr. 28, 2008 Page 227 of 994
REJ09B0452-0100