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HD151TS206SS Datasheet, PDF (19/34 Pages) Renesas Technology Corp – Mother Board Clock Generator for Intel P4+ Chipset (Springdale)
HD151TS206SS
I2C Controlled Register Bit Map (cont.)
Byte25 Control Register
Bit Description
Contents
7
CPU Clock Skew1 Control
Delay
Ahead
Bit3
1000 = +0.00ns, 0111 = –0.25ns
6
CPU Clock Skew1 Control
1001 = +0.25ns, 0110 = –0.50ns
Bit2
1010 = +0.50ns, 0101 = –0.75ns
1011 = +0.75ns, 0100 = –1.00ns
5
CPU Clock Skew1 Control 1100 = +1.00ns, 0011 = –1.25ns
Bit1
1101 = +1.25ns, 0010 = –1.50ns
4
CPU Clock Skew1 Control 1110 = +1.50ns, 0001 = –1.75ns
Bit0
1111 = +1.75ns, 0000 = –2.00ns
3
CPU Clock Skew2 Control
Delay
Ahead
Bit3
1000 = +0.0ns, 0111 = –0.1ns
2
CPU Clock Skew2 Control
1001 = +0.1ns, 0110 = –0.2ns
Bit2
1010 = +0.2ns, 0101 = –0.3ns
1011 = +0.3ns, 0100 = –0.4ns
1
CPU Clock Skew2 Control 1100 = +0.4ns, 0011 = –0.5ns
Bit1
1101 = +0.5ns, 0010 = –0.6ns
0
CPU Clock Skew2 Control 1110 = +0.6ns, 0001 = –0.7ns
Bit0
1111 = +0.7ns, 0000 = –0.8ns
Note: 1. Total CPU Clock Skew is Skew1+Skew2.
Type
R/W
R/W
Default
1
0
Note
See
Note1
R/W 0
R/W 0
R/W 1
R/W 0
See
Note1
R/W 0
R/W 0
Byte26 Control Register
Bit Description
Contents
Type
7
PCIF / PCI Clock Skew2
Skew2 is “Late” Skew that is Delay
R/W
Control Bit3
Time from “Normal” Skew1.
6
PCIF / PCI Clock Skew2
0000 = +0.0ns, 1000 = +4.0ns
R/W
Control Bit2
0001 = +0.5ns, 1001 = +4.5ns
0010 = +1.0ns, 1010 = +5.0ns
5
PCIF / PCI Clock Skew2
0011 = +1.5ns, 1011 = +5.5ns
R/W
Control Bit1
0100 = +2.0ns, 1100 = +6.0ns
4
PCIF / PCI Clock Skew2
0101 = +2.5ns, 1101 = +6.5ns
R/W
Control Bit0
0110 = +3.0ns, 1110 = +7.0ns
0111 = +3.5ns, 1111 = +7.5ns
3
PCIF / PCI Clock Skew1
Skew1 is “Normal” Skew.
R/W
Control Bit3
Delay
Ahead
2
PCIF / PCI Clock Skew1
1000 = +0.0ns, 0111 = –0.5ns
R/W
Control Bit2
1001 = +0.5ns, 0110 = –1.0ns
1010 = +1.0ns, 0101 = –1.5ns
1
PCIF / PCI Clock Skew1
1011 = +1.5ns, 0100 = –2.0ns
R/W
Control Bit1
1100 = +2.0ns, 0011 = –2.5ns
0
PCIF / PCI Clock Skew1
1101 = +2.5ns, 0010 = –3.0ns
R/W
Control Bit0
1110 = +3.0ns, 0001 = –3.5ns
1111 = +3.5ns, 0000 = –4.0ns
Note: 1. PCIF / PCI Clock Skew is Skew1 (= Normal) or Skew1+Skew2 (= Late).
Default
0
0
Note
See
Note1
0
0
1
See
Note1
0
0
0
Rev.1.00, Apr.28.2003, page 19 of 34