HYB18T1G400BF_07 Datasheet, PDF (16/74 Pages) Qimonda AG – 1-Gbit Double-Data-Rate-Two SDRAM

Internet Data Sheet
HY[B/I]18T1G[40/80/16]0B[C/F](L/V)
1-Gbit Double-Data-Rate-Two SDRAM
Ball#
Name
Ball
Type
Other Balls ×16 Organization
K9
ODT
I
Buffer
Type
SSTL
Function
On-Die Termination Control
Abbreviation
I
O
I/O
AI
PWR
GND
NC
Description
Standard input-only ball. Digital levels.
Output. Digital levels.
I/O is a bidirectional input/output signal.
Input. Analog levels.
Power
Ground
Not Connected
TABLE 11
Abbreviations for Ball Type
Abbreviation
SSTL
LV-CMOS
CMOS
OD
TABLE 12
Abbreviations for Buffer Type
Description
Serial Stub Terminated Logic (SSTL_18)
Low Voltage CMOS
CMOS Levels
Open Drain. The corresponding ball has 2 operational states, active low and tristate, and
allows multiple devices to share as a wire-OR.
Rev. 1.3, 2007-07
16
03062006-ZNH8-HURV