HYB18T512161BF Datasheet, PDF (14/41 Pages) Qimonda AG – 512-Mbit x16 DDR2 SDRAM

Internet Data Sheet
HYB18T512161BF–20/22/25/28/33
512-Mbit Double-Data-Rate-Two SDRAM
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UHJD GGU
03 % 7
Field
BA1
Bits
14
Type¹⁾
BA0
13
A
[12:0] w
1) w = write only
TABLE 9
EMR(3) Programming Extended Mode Register Definition (BA[1:0]=10_B)
Description
Bank Adress[1]
1_B BA1 Bank Address
Bank Adress[0]
1_B BA0 Bank Address
Address Bus[12:0]
0_B A[12:0] Address bits
Input Pin
x16 components
DQ[7:0]
DQ[15:8]
LDQS
LDQS
UDQS
UDQS
LDM
UDM
EMRS(1) Address Bit A10
X
X
X
0
X
0
X
X
Note: X = don’t care; 0 = bit set to low; 1 = bit set to high
TABLE 10
ODT Truth Table
EMRS(1) Address Bit A11
X
X
Rev. 1.43, 2006-11
14
03292006-L40N-L04G