SAA2501 Datasheet, PDF (5/52 Pages) NXP Semiconductors – Digital Audio Broadcast DAB decoder

Philips Semiconductors
Digital Audio Broadcast (DAB) decoder
Preliminary specification
SAA2501
6 PINNING
SYMBOL
RESET
FSCLK
FSCLKIN
MCLK
V_DD1
GND1
MCLKOUT
MCLKIN
X22OUT
X22IN
STOP
URDA
CDMWS
CDMEF
CDM
CDMCL
GND2
CDSCL
CDS
CDSEF
CDSWA
CDSSY
L3CLK
L3DATA
L3MODE
SD
FDEF
GND3
SCK
WS
FDAO
FDAI
FDFSY
V_DD2
TC1
TC0
TDO
TRST
TCK
January 1995
PIN
DESCRIPTION
TYPE
1 master reset input
I
2 sample rate clock output; buffered signal
O
3 sample rate clock signal input (see Table 1)
I
4 master clock output; buffered signal
O
5 supply voltage 1
−
6 ground 1
−
7 master clock oscillator output
O
8 master clock oscillator input or signal input
I
9 22.579 MHz clock oscillator output
O
10 22.579 MHz clock oscillator input or signal input
I
11 stop decoding input
I
12 unreliable data input; interrupt decoding
I
13 coded data (master input) word select output
O
14 coded data (master input) error flag input
I
15 ISO/MPEG coded data (master input)
I
16 coded data (master input) bit clock output
O
17 ground 2
−
18 coded data (slave input) bit clock
I
19 ISO/MPEG or EU147 (see Table 8) coded data (slave input)
I
20 coded data (slave input) error flag
I
21 coded data (slave input) burst window signal
I
22 coded data (slave input) frame sync
I
23 L3 interface bit clock input
I
24 L3 interface serial data input/output
I/O
25 L3 interface address/data select input
I
26 baseband audio I²S data output
O
27 filter data error flag output
O
28 ground 3
−
29 baseband audio data I²S clock output
O
30 baseband audio data I²S word select output
O
31 filter data output
O
32 filter data input
I
33 filter data output frame sync
O
34 supply voltage 2
−
35 do not connect; factory test control 1 input, with integrated pull-down resistor
I
36 do not connect; factory test control 0 input, with integrated pull-down resistor
I
37 boundary scan test data output
O
38 boundary scan test reset input; this pin should be connected to ground for
I
normal operation
39 boundary scan test clock input
I
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