SAA2501 Datasheet, PDF (22/52 Pages) NXP Semiconductors – Digital Audio Broadcast DAB decoder

Philips Semiconductors
Digital Audio Broadcast (DAB) decoder
Preliminary specification
SAA2501
handbook, full pagewidth
SD
SCK
WS
left sample
MSB
LSB
1
16/18/20/22
valid data
right sample
MSB
LSB
32
1
16/18/20/22
32
MGB502
Fig.14 Baseband output data serial transfer format.
Table 11 Signals of output interfacing
SIGNAL
SD
SCK
WS
DIRECTION
output
output
output
FUNCTION
baseband audio data
data clock
word select
The frequency of clock SCK is 64 times the sample
frequency (SCK is also used for the sub-band filter
interface).
The signal SD is the serial baseband audio data, sample
by sample (left/right interleaved; the left sample and the
right immediately following it form one stereo pair). 32 bits
are transferred per sample per channel. The samples are
transmitted in two's complement, MSB first. The output
samples are rounded to either 16, 18, 20 or 22 bit
precision, selectable by the host with L3 control interface
flags RND1 and RND0. The remainder of the
32 transferred bits per sample per channel are zero.
The word select signal WS indicates the channel of the
output samples (LOW if left, HIGH if right); WS is used for
the sub-band filter interface as well. If indicated in the
coded input data, de-emphasis filtering is performed
digitally on the output data, thus avoiding the need of
analog de-emphasis filter circuitry.
the programming sections a general transfer protocol
outline is presented. In Section 8.2 several optional
protocol enhancements are given, which on the one hand
are less transparent from the applicant's point of view, but
on the other hand increase the efficiency of the L3
interfacing.
7.20.1 L3 SIGNALS
The L3 protocol uses 3 signals (see Table 12).
Table 12 Signals of L3 protocol
SIGNAL
L3DATA
L3CLK
L3MODE
DIRECTION
input/output
input
input
FUNCTION
L3 interface serial data
L3 interface bit clock
L3 interface
address/data select
The signals operate according to the L3 protocol
description. After each device reset, the L3 interface of the
SAA2501 must be initialised and as a consequence, the
L3 interface cannot be used while the device reset signal
is activated.
7.20 The L3 control interface
The SAA2501 uses the L3 protocol with the associated
bus as the control interface with an optional host
microcontroller (see Chapter 8 for more information). In
January 1995
22