SAA2501 Datasheet, PDF (39/52 Pages) NXP Semiconductors – Digital Audio Broadcast DAB decoder

Philips Semiconductors
Digital Audio Broadcast (DAB) decoder
8.1.5.3 Halt mode
handbook, full pagewidth
L3MODE
L3CLK
L3DATA
IC to
microcontroller
tL
th2
td5
td1
td2
Preliminary specification
SAA2501
MGB509
Fig.21 Halt mode timing.
Table 39 Requirements for halt mode timing (see Fig.21)
SYMBOL
PARAMETER
t_d1
L3CLK HIGH to L3CLK LOW delay time after L3MODE HIGH
t_L
L3MODE LOW time
t_h2
L3CLK hold time before L3MODE LOW
Slave device to microcontroller
t_d2
L3DATA enable time after L3MODE HIGH
t_d5
L3DATA disable time after L3MODE LOW
REQUIREMENT
≥190
≥190
≥190
UNIT
ns
ns
ns
0 < t_d2 ≤ 50
ns
0 < t_d5 ≤ 50
ns
8.2 SAA2501 L3 protocol enhancement options
The L3 interface on the SAA2501 is limited in speed,
dictated both by the maximum SAA2501 handling speed
and the upper frequencies of the L3 interfacing standard.
On the other hand, the SAA2501 offers several
enhancements to make a better use of the SAA2501 L3
interface capacity. The enhancements are optional. The
applicant chooses whether to use them or not.
the status byte can be transferred. To avoid these status
byte transfers (thus reducing the host's load), after writing
the SAA2501 ‘read status’ operational address, L3RDY is
continuously copied to signal L3DATA during the period in
which no L3 transfers (i.e. status byte readings) are
performed. Meanwhile, L3MODE must be kept HIGH (no
L3 operational addresses may be written). As a result,
L3RDY can be tested as shown in Table 40.
8.2.1 TESTING L3RDY BY POLLING L3DATA
The host must test status flag L3RDY to make sure
whether the SAA2501 L3 interface is ready to transfer data
item bytes. According to the general protocol, described in
Section 7.20.6, the status is read by first writing the
SAA2501 ‘read status’ operational address, after which
January 1995
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