SAA2501 Datasheet, PDF (33/52 Pages) NXP Semiconductors – Digital Audio Broadcast DAB decoder

Philips Semiconductors
Digital Audio Broadcast (DAB) decoder
Preliminary specification
SAA2501
Table 33 APU coefficients item; default values after device reset
SUBSEQUENT
BYTES
7
6
5
4
3
2
1
0
APU coefficient LL⁽¹⁾
0
LL.6 = 0 LL.5 = 0 LL.4 = 0 LL.3 = 0 LL.2 = 0 LL.1 = 0 LL.0 = 0
APU coefficient LR⁽²⁾
0
LR.6 = 1 LR.5 = 1 LR.4 = 1 LR.3 = 1 LR.2 = 1 LR.1 = 1 LR.0 = 1
APU coefficient RL⁽³⁾
0
RL.6 = 1 RL.5 = 1 RL.4 = 1 RL.3 = 1 RL.2 = 1 RL.1 = 1 RL.0 = 1
APU coefficient RR⁽⁴⁾
0
RR.6 = 0 RR.5 = 0 RR.4 = 0 RR.3 = 0 RR.2 = 0 RR.1 = 0 RR.0 = 0
Notes
1. LL = 00000000; no attenuation in the left-to-left APU path.
2. LR = 01111111; infinite attenuation in the left-to-right APU path.
3. RL = 01111111; infinite attenuation in the right-to-left APU path.
4. RR = 00000000; no attenuation in the right-to-right APU path.
8 APPENDIX
8.1 Preliminary specification 3-line ‘L3’ interface
8.1.1 INTRODUCTION
The main purpose of the new interface definition is to
define a protocol that allows for the transfer of control
information and operational details between a
microcontroller and a number of slave devices, at a rate
that exceeds other common interfaces, but with a sufficient
low complexity for application in consumer products. It
should be clearly noted that the current interface definition
is intended for use in a single apparatus, preferably
restricted to a single printed circuit-board.
The new interface requires 3 signal lines (apart from a
return ‘ground’) between the microcontroller and the slave
devices (from this the name ‘L3’ is derived). These 3-lines
are common to all ICs connected to the bus: L3MODE,
L3DATA and L3CLK. L3MODE and L3CLK are always
driven by the microcontroller, L3DATA is bidirectional:
Table 34 The 3-lines common to all ICs; L3MODE,
L3CLK and L3DATA
SIGNAL
L3MODE⁽¹⁾
L3CLK⁽²⁾
L3DATA⁽³⁾
MICROCONTROLLER
output
output
output/input
SLAVE
DEVICE
input
input
input/output
Notes
1. L3MODE is used for the identification of the operation
mode.
2. L3CLK is the bit clock to which the information transfer
will be synchronized.
3. L3DATA will carry the information to be transferred.
All slave devices in the system can be addressed using a
6-bit address. This allows for up to 63 different slave
devices, as the all ‘0’ address is reserved for special
purposes. In addition it is possible to extend the number of
addressable devices using ‘extended addressing’.
January 1995
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