PNX1300 Datasheet, PDF (345/548 Pages) NXP Semiconductors – Media Processors

PNX1300/01/02/11 Data Book
fgeqflags
Philips Semiconductors
IEEE status flags from floating-point compare
greater or equal
SYNTAX
[ IF rguard ] fgeqflags rsrc1 rsrc2 → rdest
FUNCTION
if rguard then
rdest ← ieee_flags((float)rsrc1 >= (float)rsrc2)
ATTRIBUTES
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Issue slots
fcomp
147
2
No
—
1
3
SEE ALSO
fgeq igeq fgtrflags
readpcsw
DESCRIPTION
The fgeqflags operation computes the IEEE exceptions that would result from computing the comparison
rsrc1>=rsrc2 and stores a bit vector representing the exception flags into rdest. The argument values are in IEEE
single-precision floating-point format; the result is an integer bit vector. The bit vector stored in rdest has the same
format as the IEEE exception bits in the PCSW. The exception flags in PCSW are left unchanged by this operation. If
an argument is denormalized, zero is substituted before computing the comparison, and the IFZ bit in the result is set.
The fgeqflags operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is not changed.
31
7
6
5
4
3
2
1
0
0
0 OFZ IFZ INV OVF UNF INX DBZ
EXAMPLES
Initial Values
r30 = 0x40400000 (3.0), r40 = 0 (0.0)
r30 = 0x40400000 (3.0)
r10 = 0, r60 = 0x3f800000 (1.0),
r30 = 0x40400000 (3.0)
r20 = 1, r60 = 0x3f800000 (1.0),
r30 = 0x40400000 (3.0)
r30 = 0x40400000 (3.0),
r60 = 0x3f800000 (1.0)
r30 = 0x40400000 (3.0),
r61 = 0xffffffff (QNaN)
r50 = 0x7f800000 (+INF)
r55 = 0xff800000 (-INF)
r60 = 0x3f800000 (1.0),
r65 = 0x00400000 (5.877471754e-39)
r50 = 0x7f800000 (+INF)
Operation
Result
fgeqflags r30 r40 → r80
r80 ← 0
fgeqflags r30 r30 → r90
r90 ← 0
IF r10 fgeqflags r60 r30 → r100 no change, since guard is false
IF r20 fgeqflags r60 r30 → r110 r110 ← 0
fgeqflags r30 r60 → r120
r120 ← 0
fgeqflags r30 r61 → r121
r121 ← 0x10 (INV)
fgeqflags r50 r55 → r125
r125 ← 0
fgeqflags r60 r65 → r126
r126 ← 0x20 (IFZ)
fgeqflags r50 r50 → r127
r127 ← 0
A-47
PRELIMINARYSPECIFICATION