PNX1300 Datasheet, PDF (229/548 Pages) NXP Semiconductors – Media Processors

Philips Semiconductors
Image Coprocessor
A simple linear model of computation time has been fit-
ted to the tabular data and to corresponding measure-
ments with half the number of pixels per line.
It was assumed that
processing time = (time per line start)* (number of lines)
+(time per pixel) * (number of pixels)
Table 14-8, Table 14-9 and Table 14-10 give the time
per line start and the time per pixel in this equation for the
three memory bandwidth cases.
The maximum deviation between measured time and fit-
ted model is on the order of 10% in the range W = 180 ...
1024, H = 240 ...768. The deviation is much less in most
cases. The values were found by least squares fit to the
measured data.
In some cases the cumulative time for line starts contrib-
uted so little to the total computation time that the value
per line start could only be determined relatively inaccu-
rately. In other words the pixel time portion dominated
the equation so much that the line time portion was neg-
ligible, given the inaccuracies of the model.
Therefore the simple model is only thought to allow inter-
polation for other picture sizes within the range W = 180
...1024, H = 240 ... 768. Extrapolation to picture sizes
much outside this range should not be attempted using
this data.
In some cases the real ICP performance may be much
better than that predicted by the model, due to irregular
behavior of the ICP.
For horizontal and vertical up/down-scaling operations
use the larger W or H value occurring at input/output with
the H/V filter times table or model.
This will lead to overestimation of processing time by up
to 20%.
Table 14-5. Measured processing time in ms - no other load to SDRAM
W in pixels
H in pixels
horizontal filter, 1 component
horizontal filter, 3 components YUV 4:2:2
vertical filter, 1 component
vertical filter, 3 components YUV 4:2:2
yuv to rgb8a, pci output
yuv to rgb15a, pci output
yuv to rgb24, pci output
yuv to rgb24a, pci output
yuv to rgb8a, sdram output
yuv to rgb15a, sdram output
yuv to rgb24, sdram output
yuv to rgb24a, sdram output
yuv to rgb8a, bitmask, pci output
yuv to rgb8a, RGB 15a overlay, pci output
yuv to rgb8a, RGB 24a overlay, pci output
yuv to rgb8a, yuv 422a overlay, pci output
yuv to rgb8a, 422 sequencing, pci output
360
240
1.22
2.68
2.57
5.15
3.36
3.39
3.72
4.34
3.39
3.46
3.62
3.90
3.37
3.67
4.23
3.67
2.52
640
480
3.82
8.18
8.73
17.47
10.74
10.79
12.24
14.52
10.78
11.04
11.69
12.69
11.42
11.72
13.57
11.72
7.77
720
480
4.43
9.29
10.24
20.48
11.93
11.96
13.52
16.04
11.95
12.26
13.06
14.11
12.49
12.92
15.32
12.92
8.57
720
768
7.08
14.86
16.36
32.72
19.08
19.12
21.62
25.02
19.09
19.60
20.88
22.57
19.97
20.67
24.51
20.67
13.70
800
480
4.78
10.08
11.19
22.95
13.04
13.10
14.85
17.58
13.13
13.46
14.43
15.65
13.61
14.23
16.93
14.23
9.32
800
600
5.98
12.60
13.97
28.65
16.30
16.41
18.59
21.63
16.40
16.82
18.03
19.56
17.01
17.79
21.15
17.79
11.65
1024
768
9.27
19.35
22.30
44.60
26.02
26.15
29.98
35.01
26.08
26.87
28.71
31.07
27.83
28.23
33.15
28.23
18.40
Table 14-6. Measured processing time in ms - SDRAM loaded 95%, priority delay = 1
W in pixels
H in pixels
horizontal filter, 1 component
horizontal filter, 3 components YUV 4:2:2
vertical filter, 1 component
vertical filter, 3 components YUV 4:2:2
yuv to rgb8a, pci output
yuv to rgb15a, pci output
yuv to rgb24, pci output
360
240
2.01
4.11
2.60
5.20
3.51
3.52
3.88
640
480
6.37
13.69
8.79
17.59
11.08
11.11
12.51
720
480
7.60
15.62
10.34
20.66
12.17
12.22
13.79
720
768
12.16
24.96
16.50
32.96
19.46
19.51
22.08
800
480
8.02
16.56
11.25
23.15
13.51
13.47
15.21
800
600
10.02
20.68
14.05
28.89
16.88
16.82
18.99
1024
768
16.02
32.65
22.43
44.87
26.56
26.65
30.26
PRELIMINARY SPECIFICATION
14-19