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PNX1300 Datasheet, PDF (341/548 Pages) NXP Semiconductors – Media Processors
PNX1300/01/02/11 Data Book
fdivflags
Philips Semiconductors
IEEE status flags from floating-point divide
SYNTAX
[ IF rguard ] fdivflags rsrc1 rsrc2 → rdest
FUNCTION
if rguard then
rdest ← ieee_flags((float)rsrc1 / (float)rsrc2)
ATTRIBUTES
Function unit
Operation code
Number of operands
Modifier
Modifier range
Latency
Recovery
Issue slots
ftough
109
2
No
—
17
16
2
SEE ALSO
fdiv faddflags readpcsw
DESCRIPTION
The fdivflags operation computes the IEEE exceptions that would result from computing the quotient
rsrc1÷rsrc2 and stores a bit vector representing the exception flags into rdest. The argument values are in IEEE
single-precision floating-point format; the result is an integer bit vector. The bit vector stored in rdest has the same
format as the IEEE exception bits in the PCSW. The exception flags in PCSW are left unchanged by this operation.
Rounding is according to the IEEE rounding mode bits in PCSW. If an argument is denormalized, zero is substituted
before computing the quotient, and the IFZ bit in the result is set. If the quotient would be denormalized, the OFZ bit in
the result is set.
The fdivflags operation optionally takes a guard, specified in rguard. If a guard is present, its LSB controls the
modification of the destination register. If the LSB of rguard is 1, rdest is written; otherwise, rdest is not changed.
31
7
6
5
4
3
2
1
0
0
0 OFZ IFZ INV OVF UNF INX DBZ
EXAMPLES
Initial Values
r30 = 0x7f7fffff (3.402823466e+38),
r40 = 0x3f800000 (1.0)
r10 = 0,
r50 = 0x7f7fffff (3.402823466e+38)
r60 = 0x3e000000 (0.125)
r20 = 1,
r50 = 0x7f7fffff (3.402823466e+38)
r60 = 0x3e000000 (0.125)
r70 = 0x40400000 (3.0),
r80 = 0x00400000 (5.877471754e–39)
r85 = 0x7f800000 (+INF),
r86 = 0xff800000 (–INF)
Operation
fdivflags r30 r40 → r100
r100 ← 0
Result
IF r10 fdivflags r50 r60 → r110 no change, since guard is false
IF r20 fdivflags r50 r60 → r111 r111 ← 0xa (OVF INX)
fdivflags r70 r80 → r112
fdivflags r85 r86 → r113
r112 ← 0x21 (IFZ DBZ)
r113 ← 0x10 (INV)
A-43
PRELIMINARYSPECIFICATION