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OXCF950_06 Datasheet, PDF (23/66 Pages) Oxford Semiconductor – low cost asynchronous 16-bit PC card or Compact Flash UART device
OXFORD SEMICONDUCTOR, INC.
OXCF950 rev B DATA SHEET
5.5.4 Socket and Copy Register ‘SCR’ (Offset 0xFE)
This is an optional read/write register, implemented by the OXCF950, which the PCMCIA/CF card may use to distinguish
between similar cards installed in a system. This register is always written by the system before writing the card's Function
Configuration Index field in the Configuration Option register.
D7
D6
D5
D4
D3
D2
D1
D0
Reserved
Copy Number
Socket Number
Field
Reserved
Copy Number
Description
This bit is reserved for future standardization. This bit must be set to zero (0) by software when
the register is written.
PCMCIA/CF cards that indicate in their CIS that they support more than one copy of identically
configured cards, should have a copy number (0 to MAX twin cards, MAX = n-1) written back
to the socket and Copy register.
This field indicates to the card that it is the n’th copy of the card installed in the system, which
is identically configured. The first card installed receives the value 0. This permits identical
cards designed to share a common set of I/O ports while remaining uniquely identifiable and
consecutively ordered.
Socket Number
This field indicates to the PCMCIA/CF card that it is located in the n’th socket. The first socket
is numbered o. This permits any cards designed to do so to share a common set of I/O ports
while remaining uniquely identifiable.
Table 20: Socket and Copy Register
5.6 Card Information Structure
5.6.1 Local Bus Mode
Value
Tuple Name
(Hex)
Direct Attribute
0x01
CISTPL_DEVICE
0x02
0x00
0xFF
0x03
CISTPL_INDIRECT
0x00
0xFF
CISTPL_END
Indirect Attribute
0x13
CISTPL_LINKTARGET
0x03
0x43
0x49
0x53
0x1C
CISTPL_DEVICE_OC
0x03
0x03
0x00
0xFF
0x20
CISTPL_MANFID
0x04
0x79
DS-0027 Feb 06
Description
CIS should start with a CISTPL_DEVICE tuple.
Use indirect access register (located in direct common memory).
The first tuple in indirect memory must be a CISTPL_LINKTARGET to prove that a
valid CIS chain is present. The host will start processing from location 0 of the
indirect attribute memory, after following an implied link from the primary CIS chain
in direct attribute memory.
This tuple allows the device to be operated at 3.3 volts as well as at 5.0 volts.
This tuple specifies the manufacturer ID and product ID codes (0x0279 and 0x950B
respectively).
External—Free Release
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