OXCF950_06 Datasheet, PDF (19/66 Pages) Oxford Semiconductor – low cost asynchronous 16-bit PC card or Compact Flash UART device

OXFORD SEMICONDUCTOR, INC.
OXCF950 rev B DATA SHEET
Generic Page Switch register ‘GPS’ (Offset 0x0F)
This register provides a mechanism for the user to switch out of accessing the configuration registers when in Generic mode i.e.
when the configuration registers overlay the UART registers.
Bits
Description
0
Write 0 to switch out of overlay mode
This feature is new to OXCF950 rev B
Table 14: Generic Page Switch
Read/Write
Reset
EEPROM PCMCIA
-
W
0
5.4 CF / PCMCIA Interrupt
5.4.1 Interrupt Generation
PCMCIA/CF cards support pulse or level type interrupt signals to request interrupt service from the host system. The CIS of the
card specifies whether pulse, level or both types of interrupt can be generated. Once the host has read the CIS it is able to set
the LevlReq field in the Configuration Options Register (COR) to tell the card which type of interrupts should be generated.
The OXCF950 is capable of generating either type of interrupt. However, to reduce power consumption, the default CIS states
that only level type interrupts can be generated. A custom CIS can be constructed that specifies the card has the ability to
generate pulse type interrupts, if this is required, by using an external EEPROM.
The OXCF950 uses a programmable clock divider circuit to generate pulse type interrupts signals. The pulse that is generated is
one clock cycle (after division) in length. The divider circuit can be programmed by setting the contents of the Interrupt Pulse
Divide Value field in the DIV local configuration register (see section 6.3.4.3). This allows the length of the pulse to be varied, so
that different clock frequencies can be used and the pulse can still be kept as short as possible, without violating the minimum
length of 50 μs as defined in the PCMCIA Standard. Table 15 shows how the register should be programmed for different clock
frequencies.
Clock Frequency (MHz)
f< 2
2 <= f < 4
4 <= f < 8
8 <= f < 16
16 <= f < 32
32 <= f < 64
RESERVED
Interrupt Divider Setting
000
001
010
011
100
101
110
111
Table 15: Interrupt Pulse Divide Value settings
5.4.2 Interrupt Sources
The OXCF950 has three possible interrupt sources. These are the internal UART, and the two multi-purpose I/O pins, which can
be configured as interrupts using the MIO Configuration Register (MIC – see section 6.3.4.2) and the Interrupt Status and Control
Register (ISR – see section 6.3.4.5)
When the OXCF950 is requesting interrupt service, the Intr field within the Configuration Status Register (CSR – see section
6.5.2) will be set to 1. Otherwise this field will be cleared to 0. The Intr field value is controlled by the interrupt source (i.e UART
or MIO [1:0]). The status of the actual interrupts can be read from the ISR register.
DS-0027 Feb 06
External—Free Release
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