OXCF950_06 Datasheet, PDF (22/66 Pages) Oxford Semiconductor – low cost asynchronous 16-bit PC card or Compact Flash UART device

OXFORD SEMICONDUCTOR, INC.
OXCF950 rev B DATA SHEET
The STSCHG# signal is optional and is not supported on the OXCF950, to reduce the complexity of the device.
Note 2
Audio is not supported on the device.
Note 3
The OXCF950 does not support a specific power down mode, since it is a low power device that features a number of sleep
modes (see Section 6 for further details).
5.5.3 Pin Replacement Register ‘PRR’ (Offset 0xFC)
The Pin Replacement Register is implemented to provide information about READY, WP or the BVD[2..1] status when
implementing the I/O interface.
D7
CBVD1
D6
CBVD2
D5
CREADY
D4
CWProt
D3
RBVD1
D2
RBVD2
D1
RREADY
D0
RWProt
Field
CBVD1
CBVD2
CREADY
CWProt
RBVD1
Description
This bit is set (1) when the corresponding bit, RBVD1, changes state. This bit may also be
written by the host.
This bit is set (1) when the corresponding bit, RBVD2, changes state. This bit may also be
written by the host.
This bit is set (1) when the corresponding bit, RREADY, changes state. This bit may also be
written by the host.
This bit is set (1) when the corresponding bit, RWProt, changes state. This bit may also be
written by the host.
When read, this bit represents the internal state of the Battery Voltage Detect circuits which
would be on the BVD1 pin.
RBVD2
When this bit is written as 1 the corresponding CBVD1 bit is also written. When this bit is
written as 0, the CBVD1 bit is unaffected.
When read, this bit represents the internal state of the Battery Voltage Detect circuits which
would be on the BVD2 pin.
RREADY
When this bit is written as 1 the corresponding CBVD2 bit is also written. When this bit is
written as 0, the CBVD2 bit is unaffected.
When read, this bit represents the internal state of the READY signal. This bit may also be
used to determine the state of READY as that pin has been relocated for use as Interrupt
Request on IO Cards.
RWProt
When this bit is written as 1 the corresponding “changed” bit is also written. When this bit is
written as 0, the “changed” bit is unaffected.
When read, this bit represents the state of the WP signal. This signal may also be used to
determine the state of the Write Protect switch when pin 33 is being used for IOIS16#.
When this bit is written as 1 the corresponding “changed” bit is also written. When this bit is
written as 0, the “changed” bit is unaffected.
Table 19: Pin Replacement Register
DS-0027 Feb 06
External—Free Release
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