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OXCF950_06 Datasheet, PDF (20/66 Pages) Oxford Semiconductor – low cost asynchronous 16-bit PC card or Compact Flash UART device
OXFORD SEMICONDUCTOR, INC.
OXCF950 rev B DATA SHEET
5.5 CF/PCMCIA Function Configuration Registers
Each PCMCIA/CF card’s I/O function must implement Function Configuration Registers (FCR). These registers allow the host to
configure the function provided by the card, and are mapped into the attribute memory space at the location specified within the
CONFIG tuple (in the CIS). The CONFIG tuple defines a base address for the Function Configuration Registers and a number
corresponding to how may registers are supported (4 registers in the OXCF950). Each of these registers has read/write
capability and is mapped at even location, consistent with the design of attribute memory. The registers supported in the
OXCF950 are shown in the following table.
Offset from
FCR base
address
0
2
4
8
Attribute
memory address
F8
FA
FC
FE
Register
Configuration Options Register
Configuration and Status Register
Pin Replacement Register
Socket & Copy Register
Table 16: Configuration Register Mapping
Due to the type of function the OXCF950 configures the card to be, and the fact that it is a single function device, only a sub-set
of the total number of configuration registers are required.
The definition of each configuration register is detailed in the next few sub-sections.
5.5.1 Configuration Options Register ‘COR’ (offset 0xF8)
The configuration options register is used to configure PCMCIA/CF cards that have programmable address decoders. Once the
card’s client driver has successfully parsed the CIS, it will attempt to obtain system resources, as requested by the CIS. On
completion of this it assigns the resources to the card via the COR. The COR format and description is given in Table 17.
D7
D6
D5
D4
D3
D2
D1
D0
SRESET
LevIREQ
Function Configuration Index
Field
Type
SRESET
R/W
LevIREQ1
R/W
Function Configuration Index R/W
Description
Software reset
Setting this field to ‘1’ places the card in the reset state. This is equivalent to
setting the RESET signal (on pin) except this SRESET field is not reset.
Returning this field to ‘0’ leaves the card in the same un-configured, reset state
as the card would be following a power-up and hard reset.
Level Mode IREQ#
Setting this field to ‘1’ enables level type interrupts
Setting this field to ‘0’ enables pulse type interrupts
Configuration Index
The host sets this field to the value of the Configuration Entry Number field of a
Configuration Table Entry tuple as defined in the CIS. On setting the non-zero
value in this field the function IO is enabled and IO accesses are allowed. When
the field is set to zero (e.g. after a hard reset) the card will be configured to
memory only mode and all IO accesses will be ignored by the card.
Table 17: Configuration Option Register
Note 1
The default tuples in the CIS tell the host that only level type interrupts are supported to allow lowest power consumption. The
OXCF950 supports both level and pulse type interrupts, and if a particular manufacturer requires to use pulse type, or both, then
the CIS can be modified using the external EEPROM.
DS-0027 Feb 06
External—Free Release
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