LC89091JA Datasheet, PDF (24/30 Pages) ON Semiconductor – Digital Audio Interface Receiver

9.10.2 Details of Registers
00h
D7
Register name
"0"
Initial value
0
Setting
R
D6
MPSEL
0
R/W
LC89091JA
Address: 00h; System Setting
D5
D4
D3
DATWT
ERRWT
ADMODE
0
0
0
R/W
R/W
R/W
D2
AMPOPR
0
R/W
D1
PDMODE
0
R/W
D0
SYSRST
0
R/W
SYSRST
System reset
0: Don’t reset (initial value)
1: Reset all circuits other than registers
PDMODE
Power down mode setting
0: Normal operation (initial value)
1: Power down mode (clock operation stop)
AMPOPR
Oscillation amplifier operation setting
0: Automatic stopping of oscillation amplifier while PLL is locked (initial value)
1: Permanent continuous operation
ADMODE
S/PDIF reception refusal mode setting
0: Normal operation (initial value)
1: Always PLL unlock state
ERRWT
ERR wait time setting after PLL is locked
0: Error is canceled after 3 occurrences of preamble B are counted (initial value)
1: Error is canceled after 6 occurrences of preamble B are counted
DATWT
DATAO wait time setting after PLL is unlocked
0: Mute is canceled after about 5.4 ms (initial value)
1: Mute is canceled after about 342ms
MPSEL
MPIO pin input/output setting
0: Pre-emphasis flag output (initial value)
1: S/PDIF input
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