LC89091JA Datasheet, PDF (23/30 Pages) ON Semiconductor – Digital Audio Interface Receiver

9.10 Registers
9.10.1 Register Map
LC89091JA
Setting Item
R/W Adr
D7
Table 9.1: Register Map
D6
D5
D4
System
R/W 00h
"0"
MPSEL
DATWT
ERRWT
Clock
R/W 01h
"0"
"0"
XOUTCK
PRSEL1
Data
R/W 02h NPMODE ERRSEL GPOSEL1 GPOSEL0
Fs calculation
R 03h
0
0
0
ERRFLG
Channel status
R 04h
CS7
CS6
CS5
CS4
R 05h
CS15
CS14
CS13
CS12
R 06h
CS23
CS22
CS21
CS20
R 07h
CS31
CS30
CS29
CS28
R 08h
CS39
CS38
CS37
CS36
 "0" is a reserved bit. Always must be set to "0".
D3
ADMODE
PRSEL0
DATMUT
FSC3
CS3
CS11
CS19
CS27
CS35
D2
AMPOPR
PLLDIV1
THRSEL
FSC2
CS2
CS10
CS18
CS26
CS34
D1
PDMODE
PLLDIV0
DINSEL
FSC1
CS1
CS9
CS17
CS25
CS33
D0
SYSRST
PLLACC
DAFORM
FSC0
CS0
CS8
CS16
CS24
CS32
No.A2172-23/30