LC89091JA Datasheet, PDF (13/30 Pages) ON Semiconductor – Digital Audio Interface Receiver

LC89091JA
8.6 Data
8.6.1 Reception range of S/PDIF input
 _{The input data reception range is 32kHz to 192kHz.}
8.6.2 S/PDIF Input/Output pins (RXIN, MPIO, GPO)
 _{Two digital input pins and one through output pin are provided.}
 _{RXIN and MPIO are TTL input level pins with 3.3V-tolerance voltage.}
 _{MPSEL register needs to be set up, using MPIO as S/PDIF input.}
 _{The demodulation data is selected with DINSEL register.}
 _{All the S/PDIF input pins can receive 32kHz to 192kHz data.}
 _{GPO is input selector output pin, and output the S/PDIF through data.}
 _{The demodulated data and the through output data can be selected separately.}
 _{The GPO pin output data is selected with GPOSEL[1:0] and THRSEL register.}
 _{When MPIO is no-load at an output setup, don't choose MPIO by DINSEL or THRSEL register.}
 _{In order to stop demodulation processing and to switch to oscillation amplifier operation, the S/PDIF input to RXIN}
and MPIO is stopped, or PLL is always set as an unlocking state by ADMODE register.
Optical
Optical
0 to 100
LC89091JA
RXIN
GPO
0 to 100
MPIO
Figure 8.6: S/PDIF Input Circuit Example
8.6.3 Output Data Format (DATAO)
 The DATAO output data format is set with DAFORM register.
 The initial value of the output format is I²S. The data is output synchronized with BCKIN falling edge.
LRCKO
BCKO
DATAO
L -ch
R-ch
MSB
LSB
24bit
MSB
LSB
24bit
[ DAFORM=0 ] : I²S Data Output
LRCKO
BCKO
DATAO
L -ch
R-ch
MSB
LSB
24bit
MSB
LSB
24bit
[ DAFORM=1 ] : MSB first Left-Justified Data Output
Figure 8.7: DATAO pin Data Output Timing
MSB
No.A2172-13/30