LC89091JA Datasheet, PDF (22/30 Pages) ON Semiconductor – Digital Audio Interface Receiver

LC89091JA
9.9 READ Operation
 When the R/W bit is "1", the READ instruction is executed.
 After Start condition input, Slave-address (R/W=0) and Register-address are input one by one.
 After an acknowledge is generated, Start condition (Sr) and Slave-address (R/W=1) input again. And, after an
acknowledge is generated, the data of the Register-address specified is output.
 If the microcontroller does not generate an acknowledge but generate the Stop condition, the LC89091JA discontinues
transmission.
SDA
00100100
0 0 0 0 A3 A2 A1 A0
00100101
D7 D6 D5 D4 D3 D2 D1 D0
SCL
S
Start
condition
Slave address
R/W ACK
Register address
Sr
ACK
Slave address
R/W ACK
Figure 9.8: I²C Data Read Timing Chart (Random Read)
Control data
P
ACK Stop
condition
 If a microcontroller returns an acknowledge after 8 bits (1 byte) data output, the data (1 byte) of the next address will
be read continuously.
 If an address value becomes 08h address, the next address will be read from 00h data one by one.
 If a microcontroller does not generate an acknowledge but generate the Stop condition, the LC89091JA discontinues
transmission.
Slave address
SDA S 0 0 1 0 0 1 0
Register address
0000
Slave address
Sr 0 0 1 0 0 1 0
Data (n)
Data (n+1)
Data (n+x)
P
Figure 9.9: I²C Data Read Timing Chart (Sequential Read)
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