LC89091JA Datasheet, PDF (21/30 Pages) ON Semiconductor – Digital Audio Interface Receiver

LC89091JA
9.8 WRITE Operation
 When the R/W bit is "0", the WRITE instruction is executed.
 After Start condition input, Slave-address (R/W=0) and Register-address are input one by one.
 After an acknowledge is generated, the write data is taken in by SCL in front of an acknowledge clock pulse.
 When the Slave-address is differ, an acknowledge is not generated, SDA line will be in an open state.
In this case, it has to input from Start conditions (S).
SDA
00100100
0 0 0 0 A3 A2 A1 A0
D7 D6 D5 D4 D3 D2 D1 D0
SCL
S
Start
condition
Slave address
R/W ACK
Register address (n)
ACK
Control data (n)
P
ACK Stop
condition
Figure 9.6: I²C Data Write Timing Chart (Byte Write)
 After receipt of 8 bits (1 byte) data, when data (1 byte) transmits further without sending Stop conditions after an
acknowledge generation, the Register-address counter is incremented by one and data is stored in the next address.
 If an address value becomes 08h address, address counter will "rolls over" to 00h address and data is stored from 00h
and the previous data will be overwritten.
Slave address R/W
Register address (n)
SDA S 0 0 1 0 0 1 0 0 0 0 0 0
Data (n)
Data (n+1)
Data (n+2)
Data (n+x)
P
Figure 9.7: I²C Data Write Timing Chart (Page Write)
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