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| COP8AME9 Datasheet, PDF (74/83 Pages) National Semiconductor (TI) – 8-Bit CMOS Flash Microcontroller with 8k Memory, Dual Op Amps, Virtual EEROM, Temperature Sensor,10-Bit A/D and Brownout Reset | |||
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22.0 Instruction Set (Continued)
JSRL
JSR
JSRB
Addr.
Addr.
Addr
Jump SubRoutine Long
Jump SubRoutine
Jump SubRoutine Boot ROM
JID
RET
RETSK
Jump InDirect
RETurn from subroutine
RETurn and SKip
RETI
INTR
NOP
RETurn from Interrupt
Generate an Interrupt
No OPeration
22.7 INSTRUCTION EXECUTION TIME
Most instructions are single byte (with immediate addressing
mode instructions taking two bytes).
Most single byte instructions take one cycle time to execute.
Skipped instructions require x number of cycles to be
skipped, where x equals the number of bytes in the skipped
instruction opcode.
See the BYTES and CYCLES per INSTRUCTION table for
details.
Bytes and Cycles per Instruction
The following table shows the number of bytes and cycles for
each instruction in the format of byte/cycle.
Arithmetic and Logic Instructions
ADD
ADC
SUBC
AND
OR
XOR
IFEQ
IFGT
IFBNE
DRSZ
SBIT
RBIT
IFBIT
[B]
Direct
Immed.
1/1
3/4
2/2
1/1
3/4
2/2
1/1
3/4
2/2
1/1
3/4
2/2
1/1
3/4
2/2
1/1
3/4
2/2
1/1
3/4
2/2
1/1
3/4
2/2
1/1
1/3
1/1
3/4
1/1
3/4
1/1
3/4
RPND
1/1
[SP]âPL, [SPâ1]âPU,SPâ2, PCâii
[SP]âPL, [SPâ1]âPU,SPâ2, PC9â¦0âi
[SP]âPL, [SPâ1]âPU,SPâ2,
PLâAddr,PUâ00, switch to flash
PLâROM (PU,A)
SP + 2, PLâ[SP], PUâ[SPâ1]
SP + 2, PLâ[SP],PUâ[SPâ1],
skip next instruction
SP + 2, PLâ[SP],PUâ[SPâ1],GIEâ1
[SP]âPL, [SPâ1]âPU, SPâ2, PCâ0FF
PCâPC + 1
Instructions Using A & C
CLRA
1/1
INCA
1/1
DECA
1/1
LAID
1/3
DCORA
1/1
RRCA
1/1
RLCA
1/1
SWAPA
1/1
SC
1/1
RC
1/1
IFC
1/1
IFNC
1/1
PUSHA
1/3
POPA
1/3
ANDSZ
2/2
Transfer of Control Instructions
JMPL
3/4
JMP
2/3
JP
1/3
JSRL
3/5
JSR
2/5
JSRB
2/5
JID
1/3
VIS
1/5
RET
1/5
RETSK
1/5
RETI
1/5
INTR
1/7
NOP
1/1
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