COP8AME9 Datasheet, PDF (18/83 Pages) National Semiconductor (TI) – 8-Bit CMOS Flash Microcontroller with 8k Memory, Dual Op Amps, Virtual EEROM, Temperature Sensor,10-Bit A/D and Brownout Reset

10.0 Functional Description (Continued)
FIGURE 6. RAM Organization
20006361
10.4.1 Virtual EEPROM
The Flash memory and the User ISP functions (see Section
5.7), provide the user with the capability to use the flash
program memory to back up user defined sections of RAM.
This effectively provides the user with the same nonvolatile
data storage as EEPROM. Management, and even the
amount of memory used, are the responsibility of the user,
however the flash memory read and write functions have
been provided in the boot ROM.
One typical method of using the Virtual EEPROM feature
would be for the user to copy the data to RAM during system
initialization, periodically, and if necessary, erase the page of
Flash and copy the contents of the RAM back to the Flash.
10.5 OPTION REGISTER
The Option register, located at address 0x1FFF in the Flash
Program Memory, is used to configure the user selectable
security, WATCHDOG, and HALT options. The register can
be programmed only in external Flash Memory programming
or ISP Programming modes. Therefore, the register must be
programmed at the same time as the program memory. The
contents of the Option register shipped from the factory read
00 Hex.
The format of the Option register is as follows:
Bit 7 Bit 6
Reserved
Bit 5
SECURITY
Bit 4 Bit 3
Reserved
Bit 2
WATCH
DOG
Bit 1
HALT
Bit 0
FLEX
Bits 7, 6 These bits are reserved and must be 0.
Bit 5
= 1 Security enabled. Flash Memory read and write
are not allowed except in User ISP/Virtual E² com-
mands. Mass Erase is allowed.
= 0 Security disabled. Flash Memory read and write
are allowed.
Bits 4, 3 These bits are reserved and must be 0.
Bit 2
= 1 WATCHDOG feature disabled. G1 is a general
purpose I/O.
= 0 WATCHDOG feature enabled. G1 pin is
WATCHDOG output with weak pullup.
Bit 1
= 1 HALT mode disabled.
= 0 HALT mode enabled.
Bit 0
= 1 Execution following RESET will be from Flash
Memory.
= 0 Flash Memory is erased. Execution following RE-
SET will be from Boot ROM with the MICROWIRE/
PLUS ISP routines.
The COP8 assembler defines a special ROM section type,
CONF, into which the Option Register data may be coded.
The Option Register is programmed automatically by pro-
grammers that are certified by National.
The user needs to ensure that the FLEX bit will be set when
the device is programmed.
The following examples illustrate the declaration of the Op-
tion Register.
Syntax:
[label:].sect
.db
config, conf
value
;1 byte,
;configures
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