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COP8AME9 Datasheet, PDF (43/83 Pages) National Semiconductor (TI) – 8-Bit CMOS Flash Microcontroller with 8k Memory, Dual Op Amps, Virtual EEROM, Temperature Sensor,10-Bit A/D and Brownout Reset
14.0 USART (Continued)
FIGURE 21. USART Block Diagram
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14.1 USART CONTROL AND STATUS REGISTERS
The operation of the USART is programmed through three
registers: ENU, ENUR and ENUI.
14.2 DESCRIPTION OF USART REGISTER BITS
ENU — USART CONTROL AND STATUS REGISTER (Ad-
dress at 0BA)
PEN
Bit 7
PSEL1
XBIT9/
PSEL0
CHL1
CHL0
ERR
RBFL TBMT
Bit 0
PEN: This bit enables/disables Parity (7- and 8-bit modes
only). Read/Write, cleared on reset.
PEN = 0 Parity disabled.
PEN = 1 Parity enabled.
PSEL1, PSEL0: Parity select bits. Read/Write, cleared on
reset.
PSEL1 = 0, PSEL0 = 0 Odd Parity (if Parity enabled)
PSEL1 = 0, PSEL1 = 1 Even Parity (if Parity enabled)
PSEL1 = 1, PSEL0 = 0 Mark(1) (if Parity enabled)
PSEL1 = 1, PSEL1 = 1 Space(0) (if Parity enabled)
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