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PC87591L-N05 Datasheet, PDF (394/401 Pages) National Semiconductor (TI) – LPC Mobile Embedded Controller | |||
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C. Booter Program
The PC87591L-N05 Booter program resides in the 4K on-chip ROM.
The Booter has two main functions:
⢠On power-up, it performs all boot procedures and then passes control to the ï¬rmware (EC BIOS).
⢠If there is a problem with the ï¬rmware (EC BIOS), or if the user forces Recovery mode, the Booter enters Recovery
mode and allows debugging via JTAG or RS-232 debugging channels.
C.1 BOOT DATA
Header 1 resides at the address 100016 in the external flash and is defined as follows:
Offset Length
00-01
02-03
04-05
06
07
2
Signature
2
Bus Width
2 Address of Header 2
1
Action Flag
1
Conï¬g
.............
Header 2
Note: The first eight bytes are not included in the checksum count.
⢠Signature (two bytes at offset 0):
The signature can be one of the following:
â 4916 in the lower byte and 4A16 in the higher byte or 4A4916 in little endian convention (Light signature),
â 4916 in the lower byte and 4E16 in the higher byte or 4E4916 in little endian convention (Normal signature).
⢠Bus Width (one word at offset 2):
This byte instructs the Booter as follows:
Bit
Description
0-6 Reserved.
7 Bus width.
0: External flash device is in 8-bit data mode (byte wide)
1: External flash device is in 16-bit data mode (word wide)
8-15 Reserved.
.
⢠Address of Header 2: (1 word at offset 4)
The starting address of Header 2. This ï¬eld stores the PC value of Header 2. Thus, its value is the address divided
by 2. Checksum counting begins at this address.
⢠Action Flag: (1 byte at offset 6)
Reserved.
⢠Conï¬g: (1 byte at offset 7)
This byte instructs the Booter as follows:
Bit
0 XOR Checksum.
0: Do not perform the XOR checksum
1: Perform the XOR checksum
Description
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394
Revision 1.2
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