PC87591L-N05 Datasheet, PDF (391/401 Pages) National Semiconductor (TI) – LPC Mobile Embedded Controller

A. Register List (Continued)
Host Runtime Registers
A.4.4 Shared Memory Host
(Section 5.3.7 on page 268)
SMIMA0
SMIMA1
SMIMA2
SMIMA3
SMIMD
SMHAP1,2
SMHSEM
7
6
5
4
3
2
1
0
Indirect Memory Address (7-0)
Indirect Memory Address (15-8)
Indirect Memory Address (23-16)
Indirect Memory Address (31-24)
Indirect Memory Data (7-0)
Host Access Protection Index
Index Write
Host Lock
Protection
Host Write
Protection
Host Read
Protection
CSEM3 CSEM2 CSEM1 CSEM0 HSEM3 HSEM2 HSEM1 HSEM0
A.4.5 MSWC Host
(Section 5.5.5 on page 285)
7
6
5
4
3
2
1
0
WK_STS0
WK_EN0
WK_CFG
WK_SIGV
WK_STATE
WK_SMIEN0
WK_IRQENO
Module IRQ
Event Status
Software
Event Sta-
tus
Module IRQ
Event Enable
Software
Event
Enable
Reserved
Reserved
RING
Event
Status
RING
Event
Enable
Reserved
Reserved
PWUREQ PWUREQ
Wakeup Output
or IRQ Value
PM2 SMI
Output
Reserved
S5
S4
S3
SW Event
Reserved to SMI
Enable
Reserved
Ring Event
to SMI
Enable
SW Event
Reserved to IRQ
Enable
Reserved
Ring Event
to IRQ
Enable
Reserved
Reserved
PM1 SMI
Output
S2
Reserved
Reserved
RI2 Event RI1 Event
Status
Status
RI2 Event RI1 Event
Enable Enable
Configuration Bank
Select
SMI Wake- SMI Output
up Output Value
S1
RI2 Event
to SMI
Enable
RI2 Event
to IRQ
Enable
Reserved
RI1 Event
to SMI
Enable
RI1 Event
to IRQ
Enable
A.4.6 Host Interface (HI) Registers
(“Host Addresses” on page 242)
7
6
DBBOUT
STATUS
DBBIN
COMAND
ST3
ST2
5
4
3
2
Keyboard/Mouse DBBOUT Data
ST1
ST0
A2
F0
Keyboard/Mouse DBBIN Data
Keyboard/Mouse DBBIN Data
1
0
IBF
OBF
Revision 1.2
391
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