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PC87591L-N05 Datasheet, PDF (356/401 Pages) National Semiconductor (TI) – LPC Mobile Embedded Controller
7.0 Device Specifications (Continued)
Symbol
tBUFo
tCSTOso
tCSTRho
tCSTRso
tDHCso
tDLCso
tSCLfo
tSCLro
tSDAfo
tSDAro
Figure
Description
Reference Conditions
140
Bus free time between Stop
and Start conditions
140
SCL setup time
Before Stop condition
140, 141 SCL hold time
After Start condition
141
SCL setup time
Before Start condition
141
Data high setup time
Before SCL RE
140
Data low setup time
Before SCL RE
139
SCL signal fall time
139
SCL signal rise time
139
SDA signal fall time
139
SDA signal rise time
Min
tSCLhigho
tSCLhigho
tSCLhigho
tSCLhigho
tSCLhigho
− tSDAro
tSCLhigho
− tSDAfo
tSDAho
tSDAvo
142
SDA hold time
142
SDA valid time
After SCL FE
After SCL FE
7 * tCLK −
tSCLfo
1. Test conditions: RL = 2.2 KΩ to VCC = 3.3V, CL = 400 pF to GND.
2. Not tested; guaranteed by design.
3. Not tested; guaranteed by characterization.
4. Depends on the signal’s capacitance and the pull-up value. Must be less than 1 µs.
Max
3001,3
See note4
300
See
note1,3,4
7 * tCLK +
tSDAro
Unit
-
-
-
-
-
-
ns
ns
-
-
-
In Figure 139 through Figure 142, an “o” is added to parameter names in the timing tables for output signals and an “i” for
input signals, as displayed in the preceding table:
SDA
0.7 VCC
0.3 VCC
tSDAro
tSDAri
0.7 VCC
0.3 VCC
tSDAfo
tSDAfi
SCL
0.7 VCC
0.3 VCC
tSCLro
tSCLri
0.7 VCC
0.3 VCC
tSCLfo
tSCLfi
Figure 139. ACB Signals (SDA and SCL) Rising Time and Falling Time
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Revision 1.2