English
Language : 

PC87591L-N05 Datasheet, PDF (1/401 Pages) National Semiconductor (TI) – LPC Mobile Embedded Controller
PRELIMINARY
April 2004
Revision 1.2
PC87591L-N05
LPC Mobile Embedded Controller
General Description
The National Semiconductor PC87591L-N05 is a highly in-
tegrated embedded controller with an embedded RISC core
and integrated advanced functions. This device is targeted
for a wide range of portable applications that use the Low
Pin Count (LPC) interface.
In this datasheet, references to the PC87591L-N05 include
the PC87591L-VPCN05 and PC87591L-SLCN05.
The PC87591L-N05 incorporates the National CompactRISC
CR16B core (a high-performance 16-bit RISC processor),
on-chip ROM and RAM memories, system support func-
tions and a Bus Interface Unit (BIU) that directly interfaces
with external memory (such as flash) and I/O devices.
System support functions include: watchdog, PWM, timers,
interrupt control, General-Purpose I/O (GPIO) with internal
keyboard matrix scanning, PS/2® Interface, ACCESS.bus®
interface and high-accuracy analog-to-digital (ADC) and
digital-to-analog (DAC) converters for battery charging, sys-
tem control, system health monitoring and analog controls.
The PC87591L-N05 interfaces with the host via an LPC inter-
face that provides the host with access to the following: Key-
board and embedded controller interface channels, integrated
functions, Real-Time Clock (RTC) and BIOS firmware.
Like other members of the National SuperI/O family, the
PC87591L-N05 is PC01 and ACPI compliant.
Outstanding Features
■ Host interface, based on Intel’s LPC Interface
Specification Revision 1.1, August 2002
■ PC01 Rev 1.0, and ACPI 2.0 compliant
■ 16-bit RISC core, with 2 Mbytes address space,
running at up to 20 MHz
■ JTAG-based debugger interface
■ Shared BIOS flash memory (external)
■ 92 GPIO ports (including keyboard scanning) with a
variety of wake-up events
■ Software- and hardware-controlled clock throttling, and
extremely low current consumption in Idle mode
■ 176-pin LQFP and FBGA packages
Block Diagram
LPC Serial
I/F IRQ SMI
Reset &
Config
CR16B Core
Processing
Unit
DMA
Host
Controlled
Functions
Core Bus
I/F Functions
Memory
LPC Bus I/F
CR Access Shared mem. Bus
Bridge + Protection Adapter
RAM
ROM
BIU
Internal Bus
Peripheral Bus
CLK
Peripherals
KBC + PM
Host I/F
MSWC
HFCG
ICU
KBSCAN +
ACM
GPIO
ACB
(X4)
Timer +
WDG
ADC
USART
(X2)
PMC
RTC
32.768 KHz
MIWU
Debugger PS/2
I/F
I/F
MFT16
(X2)
PWM
DAC
JTAG
External
Memory + I/O
National Semiconductor and TRI-STATE are registered trademarks of National Semiconductor Corporation.
All other brand or product names are trademarks or registered trademarks of their respective holders.
© 2004 National Semiconductor Corporation