UPD98405 Datasheet, PDF (18/64 Pages) NEC – 155M ATM INTEGRATED SAR CONTROLLER

µPD98405
<3> Serial EEPROM interface signals
The µPD98405 has a serial EEPROM interface supporting MICROWIRE^TM interface. Through this serial
EEPROM interface, the contents of the PCI configuration register can be loaded from an EEPROM connected.
Remark It is recommended that National Semiconductor’s “NM93C46” be connected as the EEPROM.
Pin Name
E2PCS
E2PDI
Pin No.
234
231
E2PDO
232
E2PCLK
233
I/O
I/O Level
Function
O
TTL
EEPROM chip select.
This is a chip select signal for EEPROM.
I
TTL
EEPROM data input.
This signal is connected to the data output pin of the EEPROM.
This signal is internally pulled down.
O
TTL
EEPROM data output.
This signal is connected to the data input pin of the EEPROM.
O
TTL
EEPROM clock.
This pin supplies the clock necessary for transferring data with
the EEPROM. It divides the clock input to the CLK pin by 36 for
output.
<4> Expansion ROM interface signals.
The µPD98405 has an expansion ROM interface as option.
Pin Name
Pin No.
I/O
I/O Level
Function
ROMA15-
200-207,
O
ROMA0
209-213,
215-217
TTL
ROM address.
These are address signals to access the 64K expansion ROM.
ROMD7-
218-225
I
ROMD0
TTL
ROM data.
These are expansion ROM data signals and are internally pulled
down.
ROMCS_B
226
O
TTL
ROM select.
This is a chip select signal for the expansion ROM.
ROMOE_B
230
O
TTL
ROM output enable.
This signal enables the output buffer of the expansion ROM
during a read operation.
18
Data Sheet S12689EJ2V0DS00