UPD98405 Datasheet, PDF (10/64 Pages) NEC – 155M ATM INTEGRATED SAR CONTROLLER

µPD98405
Pin Name
Pin No.
I/O
I/O Level
Function
(2/2)
EMPTY_B/
248
I
TTL
PHY layer buffer empty/receive cell available.
RCLAV
This signal informs the µPD98405 that the PHY receive FIFO
(shared with
has no cell data to be transferred and that the PHY device
RCIC)
cannot supply receive data. This signal functions as EMPTY_B
when the UTOPIA interface is in the octet level handshake
mode, to indicate that the data on Rx7 through Rx0 is invalid in
the current clock cycle. In the cell level handshake mode, it
functions as RCLAV, informing the µPD98405 that no more
cells are to be supplied after transfer of the current cell is
completed.
Pull down this pin when it is not used.
RCLK
244
O
TTL
Receive clock.
This clock is used for synchronization when the µPD98405
transfers cell data to and from the PHY layer device at the
reception side. The SAR system clock input to the SCLK pin is
output from this pin as is, immediately after the µPD98405 has
been reset.
Tx7-Tx0
255-258,
O
260-263
TTL
Transmit data bus.
These pins form an 8-bit output bus that outputs data to be
transmitted to the network, to the PHY layer device in byte
format. The µPD98405 outputs the data in synchronization with
the rising edge of TCLK.
TSOC
250
O
TTL
Transmit cell start position.
This signal is output in synchronization with the first byte of
transmit cell data.
TENBL_B
251
O
TTL
Transmit enable.
This signal informs the PHY layer device that data has been
output to Tx7 through Tx0 in the current clock cycle.
FULL_B/
249
I
TTL
PHY layer buffer full/transmit cell available.
TCLAV
The FULL_B signal informs the µPD98405 that the input buffer
(shared with
of the PHY device is full and that the device can receive no
RCIT)
more data. When the UTOPIA interface is in the octet level
handshake mode, the PHY device inputs an inactive level as
this signal if the device can receive cell data. In the cell level
handshake mode, this signal functions as TCLAV, informing the
µPD98405 that the PHY device can receive the next single cell
after transfer of the current cell is completed.
Pull up this pin when it is not used.
TCLK
253
O
TTL
Transmit clock.
This clock is used for synchronization when the µPD98405
transfers cell data to and from the PHY layer device at the
transmission side. The SAR system clock input to the SCLK pin
is output as this clock as is.
10
Data Sheet S12689EJ2V0DS00