MT40A256M16GE-062E Datasheet, PDF (359/365 Pages) Micron Technology – 4Gb: x4, x8, x16 DDR4 SDRAM

Table 158: Electrical Characteristics and AC Timing Parameters (Continued)
Parameter
Exit self refresh to commands not requir-
ing a locked DLL SRX to commands not
requiring a locked DLL in self refresh
abort
Exit self refresh to ZQCL, ZQCS and MRS
(CL, CWL, WR, RTP and gear-down)
Exit self refresh to commands requiring a
locked DLL
Minimum CKE low pulse width for self re-
fresh entry to self refresh exit timing
Minimum CKE low pulse width for self re-
fresh entry to self refresh exit timing
when CA parity is enabled
Valid clocks after self refresh entry (SRE)
or power-down entry (PDE)
Valid clock requirement after self refresh
entry or power-down when CA parity is
enabled
Valid clocks before self refresh exit (SRX)
or power-down exit (PDX), or reset exit
Symbol
t_XS
t_{XS_ABORT}
t_{XS_FAST}
t_XSDLL
t_CKESR
t_{CKESR_par}
t_CKSRE
t_{CKSRE_par}
t_CKSRX
Exit power-down with DLL on to any val-
id command
Exit precharge power-down with DLL fro-
zen to commands not requiring a locked
DLL when CA Parity is enabled.
CKE MIN pulse width
Command pass disable delay
Power-down entry to power-down exit
timing
Begin power-down period prior to CKE
registered HIGH
Power-down entry period: ODT either
synchronous or asynchronous
t_XP
t_{XP _PAR}
t_{CKE (MIN)}
t_CPDED
t_PD
t_ANPD
PDE
DDR4-2666
Min Max
DDR4-2933
DDR4-3200
Min Max Min Max
MIN = ^tRFC + 10ns
MIN = ^tRFC4 + 10ns
Reserved
Min Max
MIN = ^tRFC4 + 10ns
MIN = ^tDLLK (MIN)
MIN = ^tCKE (MIN) + 1nCK
MIN = ^tCKE (MIN) + 1nCK + PL
MIN = greater of (5CK, 10ns)
MIN = greater of (5CK, 10ns) + PL
MIN = greater of (5CK, 10ns)
Power-Down Timing
MIN = greater of 4CK or 6ns
MIN = (greater of 4CK or 6ns) + PL
MIN = greater of 3CK or 5ns
4
–
4
–
4
–
MIN = ^tCKE (MIN); MAX = 9 × ^tREFI
WL - 1CK
Greater of ^tANPD or ^tRFC - REFRESH command to CKE LOW time
Unit
ns
ns
ns
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
CK
Notes
1
1
1
1
1
1
1
1
1
1
1
1