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PIC16LC63A-04 Datasheet, PDF (99/184 Pages) Microchip Technology – 8-Bit CMOS Microcontrollers with A/D Converter
PIC16C63A/65B/73B/74B
14.0 INSTRUCTION SET SUMMARY
Each PIC16CXX instruction is a 14-bit word divided
into an OPCODE, which specifies the instruction type
and one or more operands, which further specify the
operation of the instruction. The PIC16CXX instruction
set summary in Table 14-2 lists byte-oriented, bit-ori-
ented, and literal and control operations. Table 14-1
shows the opcode field descriptions.
For byte-oriented instructions, ’f’ represents a file reg-
ister designator and ’d’ represents a destination desig-
nator. The file register designator specifies which file
register is to be used by the instruction.
The destination designator specifies where the result of
the operation is to be placed. If ’d’ is zero, the result is
placed in the W register. If ’d’ is one, the result is placed
in the file register specified in the instruction.
For bit-oriented instructions, ’b’ represents a bit field
designator which selects the number of the bit affected
by the operation, while ’f’ represents the address of the
file in which the bit is located.
For literal and control operations, ’k’ represents an
eight or eleven bit constant or literal value.
TABLE 14-1:
Field
OPCODE FIELD
DESCRIPTIONS
Description
f Register file address (0x00 to 0x7F)
W Working register (accumulator)
b Bit address within an 8-bit file register
k Literal field, constant data or label
Don’t care location (= 0 or 1)
The assembler will generate code with x = 0. It is the
x recommended form of use for compatibility with all
Microchip software tools.
Destination select; d = 0: store result in W,
d d = 1: store result in file register f.
Default is d = 1
label Label name
TOS Top-of-Stack
PC Program Counter
PCLATH Program Counter High Latch
GIE Global Interrupt Enable bit
WDT Watchdog Timer/Counter
TO Time-out bit
PD Power-down bit
Destination either the W register or the specified
dest register file location
[ ] Options
( ) Contents
→ Assigned to
< > Register bit field
∈ In the set of
italics User defined term (font is courier)
The instruction set is highly orthogonal and is grouped
into three basic categories:
• Byte-oriented operations
• Bit-oriented operations
• Literal and control operations
All instructions are executed within one single instruc-
tion cycle, unless a conditional test is true or the pro-
gram counter is changed as a result of an instruction.
In this case, the execution takes two instruction cycles
with the second cycle executed as a NOP. One instruc-
tion cycle consists of four oscillator periods. Thus, for
an oscillator frequency of 4 MHz, the normal instruction
execution time is 1 µs. If a conditional test is true or the
program counter is changed as a result of an instruc-
tion, the instruction execution time is 2 µs.
Table 14-2 lists the instructions recognized by the
MPASMTM assembler.
Figure 14-1 shows the general formats that the instruc-
tions can have.
Note:
To maintain upward compatibility with
future PIC16CXX products, do not use the
OPTION and TRIS instructions.
All examples use the following format to represent a
hexadecimal number:
0xhh
where h signifies a hexadecimal digit.
FIGURE 14-1:
GENERAL FORMAT FOR
INSTRUCTIONS
Byte-oriented file register operations
13
8 76
0
OPCODE
d
f (FILE #)
d = 0 for destination W
d = 1 for destination f
f = 7-bit file register address
Bit-oriented file register operations
13
10 9 7 6
0
OPCODE
b (BIT #) f (FILE #)
b = 3-bit bit address
f = 7-bit file register address
Literal and control operations
General
13
OPCODE
87
k = 8-bit immediate value
0
k (literal)
CALL and GOTO instructions only
13
11 10
0
OPCODE
k (literal)
k = 11-bit immediate value
 2000 Microchip Technology Inc.
DS30605C-page 99