PIC16LC63A-04 Datasheet, PDF (18/184 Pages) Microchip Technology – 8-Bit CMOS Microcontrollers with A/D Converter

PIC16C63A/65B/73B/74B
TABLE 4-1: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on:
POR, BOR
Value on
all other
RESETS⁽³⁾
Bank 1
80h
INDF⁽⁴⁾
Addressing this location uses contents of FSR to address data memory (not a physical register) 0000 0000 0000 0000
81h
OPTION_REG RBPU INTEDG T0CS
T0SE
PSA
PS2
PS1
PS0 1111 1111 1111 1111
82h
PCL⁽⁴⁾
Program Counter’s (PC) Least Significant Byte
0000 0000 0000 0000
83h
STATUS⁽⁴⁾
IRP⁽²⁾
RP1⁽²⁾
RP0
TO
PD
Z
DC
C
0001 1xxx 000q quuu
84h
FSR⁽⁴⁾
Indirect data memory address pointer
xxxx xxxx uuuu uuuu
85h
TRISA
—
— PORTA Data Direction Register
--11 1111 --11 1111
86h
TRISB
PORTB Data Direction register
1111 1111 1111 1111
87h
TRISC
PORTC Data Direction register
1111 1111 1111 1111
88h
TRISD⁽⁵⁾
PORTD Data Direction register
1111 1111 1111 1111
89h
TRISE⁽⁵⁾
IBF
OBF
IBOV PSPMODE
—
PORTE Data Direction bits
0000 -111 0000 -111
8Ah
PCLATH^(1,4)
—
—
— Write Buffer for the upper 5 bits of the Program Counter
---0 0000 ---0 0000
8Bh
INTCON⁽⁴⁾
GIE
PEIE
T0IE
INTE
RBIE
T0IF
INTF
RBIF 0000 000x 0000 000u
8Ch
PIE1
PSPIE⁽⁵⁾ ADIE⁽⁶⁾
RCIE
TXIE
SSPIE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
8Dh
PIE2
8Eh
PCON
—
—
—
—
—
—
—
CCP2IE ---- ---0 ---- ---0
—
—
—
—
—
—
POR
BOR ---- --qq ---- --uu
8Fh
—
Unimplemented
—
—
90h
—
Unimplemented
—
—
91h
—
Unimplemented
—
—
92h
PR2
93h
SSPADD
Timer2 Period register
Synchronous Serial Port (I²C mode) Address register
1111 1111 1111 1111
0000 0000 0000 0000
94h
SSPSTAT
—
—
D/A
P
S
R/W
UA
BF --00 0000 --00 0000
95h
—
Unimplemented
—
—
96h
—
Unimplemented
—
—
97h
—
Unimplemented
—
—
98h
TXSTA
CSRC
TX9
TXEN
SYNC
—
BRGH
TRMT
TX9D 0000 -010 0000 -010
99h
SPBRG
Baud Rate Generator register
0000 0000 0000 0000
9Ah
—
Unimplemented
—
—
9Bh
—
Unimplemented
—
—
9Ch
—
Unimplemented
—
—
9Dh
—
Unimplemented
—
—
9Eh
—
Unimplemented
—
—
9Fh
ADCON1⁽⁶⁾
—
—
—
—
—
PCFG2 PCFG1 PCFG0 ---- -000 ---- -000
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ’0’.
Shaded locations are unimplemented, read as ‘0’.
Note 1: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8>.
2: The IRP and RP1 bits are reserved; always maintain these bits clear.
3: Other (non power-up) RESETS include external RESET through MCLR and Watchdog Timer Reset.
4: These registers can be addressed from either bank.
5: PORTD, PORTE and the parallel slave port are not implemented on the PIC16C63A/73B; always maintain these bits and
registers clear.
6: The A/D is not implemented on the PIC16C63A/65B; always maintain these bits and registers clear.
DS30605C-page 18
 2000 Microchip Technology Inc.